CMOS inverter

Thread Starter


Joined Nov 9, 2007
Hi everybody just want to know this for my Cadence design

In a CMOS inverter why do we assume that the load Capacitance is INDEPENDENT of Voltage, if we want to calculate for the fall or rise time.

Any Idea will be appreciated

Ron H

Joined Apr 14, 2005
Actually, the typical load for a CMOS gate is more CMOS gates, plus some wiring capacitance. The input capacitance to a CMOS gate is somewhat dependent on voltage, but the calculation would be an absolute nightmare, so assuming that the load is independent of voltage is a good idea. ;)
Simulation takes the voltage dependence into account and does the calculation for you, and is therefore somewhat more accurate.