I've added more to the flip-flop blog.

There is still more to come.

 

You're not screwed. It would only matter if you're connecting both Q and Q-bar to the same circuit, otherwise, the single output you're using doesn't change (using the 4013 as an example, check datasheet for a different device) If connecting both outputs, you can design for the condition. You have more ways of preventing metastability when using S/R inputs than using the clock.

Essentially both outputs are being used. Since my 4013 is being used as a " T " flip flop.

On another note, since comparators are the source of the toggle signals I do need the inverters/edge detectors. This is because the first comparator will still be high when the next one goes high and the toggle must switch. I used a website for the source of the subcircuit I used in my drawings. After doing more research into this that website showed only the authors idea of doing it. Have since found out it can be done with only one inverter for each edge detector.

 

I've added more to the flip-flop blog.

There is still more to come.

Thank you for doing this MrChips. I'm hopping you will include some "trigger" circuit ideas in this tutorial. There is a lot of information out there but not all of it is to reliable on this.

 

Thank you for doing this MrChips. I'm hopping you will include some "trigger" circuit ideas in this tutorial. There is a lot of information out there but not all of it is to reliable on this.

That's the part still to come.

 

Essentially both outputs are being used. Since my 4013 is being used as a " T " flip flop.

There are simple ways of dealing with any issues. If, for example, you connect each latch input to a AND gate, with the following equations:

Set = ON AND NOT Q
Reset = OFF AND Q

This accomplishes everything your circuit does, without any pulse generation, and prevents meta-stability.

But I sense you have no interest in pursuing this further, and you mind seems made up to use the clocking function.

 

There are simple ways of dealing with any issues. If, for example, you connect each latch input to a AND gate, with the following equations:

Set = ON AND NOT Q
Reset = OFF AND Q

This accomplishes everything your circuit does, without any pulse generation, and prevents meta-stability.

But I sense you have no interest in pursuing this further, and you mind seems made up to use the clocking function.

You'd be wrong about that. I'm doing what my pea brain knows will work. Haven't lived a life doing this stuff, just started around 2009. Didn't even know which end of a mosfet the smoke comes from when I started. Instead of putting my ideas down, how about showing what you mean. As they say "a schematic is worth a thousand words". And both of the control signals are a logic high, don't understand where the "ON"/"OFF" is coming from?
Set = ON AND NOT Q
Reset = OFF AND Q

 

Instead of putting my ideas down, how about showing what you mean. As they say "a schematic is worth a thousand words". And both of the control signals are a logic high, don't understand where the "ON"/"OFF" is coming from?

It's not putting someone's ideas down to show a better way of doing things. ON and OFF came from your drawings.

 

Is this the sort of thing you want?

 

Alec_t, yes that's what I'm after, thank you. The only thing is that the two 'pulse' signals for the clock, are from a steady "level" output of a comparator. That is why I added an edge detector in my drawings. Which seems to be now the wrong thing to do. Thank you for taking the time to add a drawing.

 

It's not putting someone's ideas down to show a better way of doing things. ON and OFF came from your drawings.

But you haven't "shown" a way. Aren't you one of the posters often saying to add a schematic, when a QUESTION is asked? Why not add a schematic to show the ANSWER? Isn't adding an "and" gate redundant to the internal makeup of the 4013? Those extra 'ands' are in the makeup of internal logic of the 4013 chip.

I guess what I'm saying is, an extra 'and chip' or an extra 'inverter' or 'buffer chip', what is the difference? So far in my total circuit I need some 'inverters' any way and have yet to need an 'and', why add another type of chip to the mix?
Why don't any of the logic how to books say to do it your way? And believe me I have books, trying to learn this stuff.

 

Why don't any of the logic how to books say to do it your way? And believe me I have books, trying to learn this stuff.

Do you know for a fact that ANY logic books don't say to do it my way? I haven't read a logic book for 30 years, but I've done logic design during that time.

Anyway, do it however you want. My posts were meant to describe an alternate method that would produce a better circuit. But you're free to do it any way you choose.

 

Reloadron give sort of an idea of what I'm attempting, that was my inspiration for my journey. For what I'm doing the can be no 'system clock', the operations are too random. The next operation is dependent on the last one. I'm going to post a couple of files showing my thoughts on doing this. I don't show most of the normal needed things to make the circuit work though. No decoupling caps, no gate drivers and no values on the RC components. The comarators are only shown as a triangle with a letter in it to differentiate one from the others, and a "H' for high output and "L" for low output on one of them. The other two are used as a high output only.

I'll do the math for the other values if it seems workable. My circuit skills are only exceeded by my math skills(not so good). So look at my ideas at you own peril. I can build something from a schematic but making one is hard for a dummy like me.

View attachment 84869 View attachment 84870

Have a google of sequential logic.

 

Do you know for a fact that ANY logic books don't say to do it my way? I haven't read a logic book for 30 years, but I've done logic design during that time.

Anyway, do it however you want. My posts were meant to describe an alternate method that would produce a better circuit. But you're free to do it any way you choose.

You still aren't saying WHY it's better. And I am doing a lot of research and reading on this stuff. I'm not being combative, just trying to learn.

 

Have a google of sequential logic.

Thanks Ron, That's kind of how I came up with what I did. One completed part of the needed result sequencing into the next one.

 

You still aren't saying WHY it's better.

Not true. You spend more time complaining about what I haven't done than considering what I have done. I'm done here.

 

@Brownout, if you are using the S/R pins to toggle, how do you set the flip flop in the correct configuration at start up then? There's a 50/50 chance it will do it on it's own, the way I understand it. Sorry I'm not as smart as you, this is all new to me.

 

Is this the sort of thing you want?
View attachment 84982

Thank you for showing the pull down resistor on the clock pin, to make the clock a " 0 " when not toggling.