Clock Circuit Critique?

Thread Starter

Mr. Beck

Joined Sep 19, 2008
Hello everyone!
I just finished the first design of a clock circuit i'm working on. Can you guys give it a look?

You can pretty much ignore the voltage doubler in the top right corner- it's for driving a Nixie tube display.
Power supply is pretty standard- no surprises there.
The clock signal is generated using a schmitt trigger and two decade counters. Hopefully the 100μF capacitor will filter the signal into something clean enough.
The actual timekeeping is a series of BCD decade counters chained together. The AND gates at the bottom form the 60-count rollover. Some connections are the same for all the 4510s, and are not shown- see the note on the left side. The outputs are also omitted, as they will all be carried to a separate board responsible for making the display light.
The timesetting circuit is a little funky. First off, the top switch stops the first counter from counting, and opens the PNP transistor between the minutes and hours, as well as powering the other switches. Second switch resets the seconds. The third switch feeds directly into the clock input of the minutes counter, and the fourth does the same with the hours. Pushing the set, minutes and hours switch at the same time results in the reset input on every IC going high, putting the clock back at zero. There is also a capacitor for power-on reset.
I taught myself EAGLE just last weekend, so if there' anything funny on that end let me know as well.