Hi All,
I am following the attached app note to design my own Class D audio amp. If you go to page 50 you will find a sample schematic to which I refer. It does not require intimate knowledge of Audio, rather only to think of the speaker as an inductive load being driven by a half bridge switch.
Please note I have a hard time believing this schematic ever worked because the upper FET has no connection to the +50V rail but in my implementation C31/C38 have their 50V connected.
Although most everything is clear to me, there are a few tidbits of the power stage which are still unclear. I am assuming they are just 'good practice' but I haven't the experience to pick up on them.
Here is a list of components and my guess at their intended purpose:
R47 & C44: Current limiter and bypass cap?
R39 & C49: Snubber? To help with bus pumping?
C30: Snubber cap? To help with bus pumping?
R61 & C33: Snubber to help with speaker spikes? Won't the LPF (L1 & C51) sort those out anyways?
SD1 & VDD_1: As far as I can tell VCC, +5V and -5V are generated from regulators but I fail to see where/how/why SD1 and VDD_1 are needed. I realize they are probably off sheet, but I am struggling to determine why VCC couldn't be used and what the designer was attempting to accomplish.
What are your thoughts on this design's current protection mechanism? It appears to me to be heavily layout dependent as it seems to be sensing voltage droops on the bus. It looks like it just toggles a relay to cut the speaker connection and thus will clear the condition and then click back in etc.. on to infinity... poor relay. I feel this protection circuit provides little benefit and a sense resistors with gate driver shutdown functionality would be better.
Your thoughts? Thanks in advance.
James
I am following the attached app note to design my own Class D audio amp. If you go to page 50 you will find a sample schematic to which I refer. It does not require intimate knowledge of Audio, rather only to think of the speaker as an inductive load being driven by a half bridge switch.
Please note I have a hard time believing this schematic ever worked because the upper FET has no connection to the +50V rail but in my implementation C31/C38 have their 50V connected.
Although most everything is clear to me, there are a few tidbits of the power stage which are still unclear. I am assuming they are just 'good practice' but I haven't the experience to pick up on them.
Here is a list of components and my guess at their intended purpose:
R47 & C44: Current limiter and bypass cap?
R39 & C49: Snubber? To help with bus pumping?
C30: Snubber cap? To help with bus pumping?
R61 & C33: Snubber to help with speaker spikes? Won't the LPF (L1 & C51) sort those out anyways?
SD1 & VDD_1: As far as I can tell VCC, +5V and -5V are generated from regulators but I fail to see where/how/why SD1 and VDD_1 are needed. I realize they are probably off sheet, but I am struggling to determine why VCC couldn't be used and what the designer was attempting to accomplish.
What are your thoughts on this design's current protection mechanism? It appears to me to be heavily layout dependent as it seems to be sensing voltage droops on the bus. It looks like it just toggles a relay to cut the speaker connection and thus will clear the condition and then click back in etc.. on to infinity... poor relay. I feel this protection circuit provides little benefit and a sense resistors with gate driver shutdown functionality would be better.
Your thoughts? Thanks in advance.
James
