Hi All,
I am new at RF circuit Design and as part of my coursework I have been given the task of designing Class-C power amplifier.
Design spec
1. 50ohm source and load impedance
2. 21dBm output power with a gain of 10dB
3. Transistor to use 2N3866
4. DC supply voltage 12V
5. Operating frequency 433MHz
6. Use L networks for matching
7. User ADS ( but I use LTSpice for the spice simulation stuff )
Methodology that I followed,
1. Find the impedance transformation networks using the transistor large signal model for input and output.
2. Plug in the transistor model, impedance transformation networks ( L networks ) , in the Class C topology and see if we get the required output and input voltages ( Voltage gain ) transient Analysis
3. * for point 3 Actually I am not sure what we can simulate , cant we simulate to a reasonable extent the output power and gain ( ignoring board layout considerations ??) , I found the following material on the subject so far with regards to simulation :
http://www.intusoft.com/articles/classc.pdf
http://whites.sdsmt.edu/classes/ee322/class_notes/322Lecture22.pdf
As I was unable to get the required (voltage gain) I was given a working circuit. The simulation does not give the required gain of 10dB but the constructed project does. Of course the board has been tuned a bit but as a starting point the following circuit has been used as the output of the Simulation stage.
The Questions I have
1. What is the purpose of L5 inductor, i don’t understand it. If the supply voltage falls below 0.7 the transistor should not conduct, what is the point of shorting the base current to ground ?
2. The L2 value is obtained by combining the RF choke and the high pass L network shunt L. ( that I understood )
3. Why is the Vout negative going pulse not clipped? as the transistor should be turned off during this period.
4. What is the correct way to calculate the input power Vs output graph ( which to me seems meaningful and feasible
http://i44.tinypic.com/fz0z2o.jpg
I am new at RF circuit Design and as part of my coursework I have been given the task of designing Class-C power amplifier.
Design spec
1. 50ohm source and load impedance
2. 21dBm output power with a gain of 10dB
3. Transistor to use 2N3866
4. DC supply voltage 12V
5. Operating frequency 433MHz
6. Use L networks for matching
7. User ADS ( but I use LTSpice for the spice simulation stuff )
Methodology that I followed,
1. Find the impedance transformation networks using the transistor large signal model for input and output.
2. Plug in the transistor model, impedance transformation networks ( L networks ) , in the Class C topology and see if we get the required output and input voltages ( Voltage gain ) transient Analysis
3. * for point 3 Actually I am not sure what we can simulate , cant we simulate to a reasonable extent the output power and gain ( ignoring board layout considerations ??) , I found the following material on the subject so far with regards to simulation :
http://www.intusoft.com/articles/classc.pdf
http://whites.sdsmt.edu/classes/ee322/class_notes/322Lecture22.pdf
As I was unable to get the required (voltage gain) I was given a working circuit. The simulation does not give the required gain of 10dB but the constructed project does. Of course the board has been tuned a bit but as a starting point the following circuit has been used as the output of the Simulation stage.
The Questions I have
1. What is the purpose of L5 inductor, i don’t understand it. If the supply voltage falls below 0.7 the transistor should not conduct, what is the point of shorting the base current to ground ?
2. The L2 value is obtained by combining the RF choke and the high pass L network shunt L. ( that I understood )
3. Why is the Vout negative going pulse not clipped? as the transistor should be turned off during this period.
4. What is the correct way to calculate the input power Vs output graph ( which to me seems meaningful and feasible
http://i44.tinypic.com/fz0z2o.jpg