Hi, I just have a quick question about the attached circuit. For an input sinusoid with zero DC offset I see how the positive portions of the cycle have a gain of +1, but for the negative portions I am getting a gain of -2.
The intended design was to rectify the signal, but I don't know why anyone would want the rectified negative portions to be of a higher magnitude than the positives.
Any insight is much appreciated.
Thanks
The intended design was to rectify the signal, but I don't know why anyone would want the rectified negative portions to be of a higher magnitude than the positives.
Any insight is much appreciated.
Thanks
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