CE Amp Design

Thread Starter

jegues

Joined Sep 13, 2010
733
I'm confused as to where he gets the equation for Vo from? (Vo = VCE + ΔVo)

Vbe is out input signal being applied to the base and has a peak voltage of 5mV.

Since this is an npn transistor, to remain in active mode Vcb > -0.4.

Vcb = Vo-Vbe > -0.4

So Vo > -3.95V ?

I don't see how he gets that Vo >= 0.3.

Can someone clarify?
 

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Audioguru

Joined Dec 20, 2007
11,248
Most transistors are saturated when their Vce is less than 0.3V.
You want the maximum possible amplitude at the collector so the transistor must avoid saturation and avoid cutoff. Bias it between them.
 

Thread Starter

jegues

Joined Sep 13, 2010
733
Most transistors are saturated when their Vce is less than 0.3V.
You want the maximum possible amplitude at the collector so the transistor must avoid saturation and avoid cutoff. Bias it between them.
Ah this is much more clear now thank you.

I was focusing on the collector voltage not noticing that it is also Vce since the emitter is sitting at the ground.
 
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