cd40110 counts in big steps

Discussion in 'The Projects Forum' started by doctortropico, Aug 8, 2013.

  1. doctortropico

    Thread Starter New Member

    Aug 4, 2013
    Hi all,

    I tried to build a simple up/down counter using two 7 segment displays and two CD40110's. I mainly followed the schematic in attachment(mainly being: for now I only added an up-button, down and reset are wired to the neutral, I also didn't use the 555-timer as a clock)

    Whenever I push the button, the counter counts in bigger steps than just +1.
    I also notice it (sometimes) counts up when I release the button.
    Here is a little video:

    I have rebuilt this four or five times, but I can not seem to get rid of the problem.

    Any thoughts on what could be wrong?
  2. bertus


    Apr 5, 2008
  3. doctortropico

    Thread Starter New Member

    Aug 4, 2013
    Thanks Bertus, I'll give it a read.

    I tried different switches, but all with the same problem. Now I know why.
  4. Dodgydave

    AAC Fanatic!

    Jun 22, 2012
  5. Mussawar


    Oct 17, 2011
    A mechanical switch, whenever pressed, will produce a countless pulses which are enough to trigger the 40110 many time resulting undesired results. You need a switch de-bouncer. Please see the attachment. This circuit is working fine fir me in my recent prefect. It will produce a neat and clean pulse. You may change values of R1 and C1 to get desire time period since there is a difference bw simulation and real circuit working.
    Last edited: Aug 9, 2013
  6. doctortropico

    Thread Starter New Member

    Aug 4, 2013
    Thanks to all.

    Someone gave me a device called a snubber. It works ok most of the time now, but occasionally still counts in steps of two.

    I will try this debouncer using the 555 timer.
  7. MrChips


    Oct 2, 2009
    Switch bounce needs to be a sticky. It comes up time and again.

    The preferred solution is to use a double-throw switch as shown in the first circuit.

    For a SPST switch, try the second circuit:

  8. ramancini8

    Active Member

    Jul 18, 2012
    The common S/R flop solution has one problem because if the first bounce does not contain enough energy to change the flop state it will relax back to its initial state while issuing a partial pulse to the logic that might or might not act.

    Without a resistor between R3 and C1 there is potential for capacitor dielectric absorption to cause an error. Often a diode is paralleled with the resistor to speed up charge time.

    Admittedly, these are esoteric errors, but they happen.