cascade 555 timer

Discussion in 'General Electronics Chat' started by recoup54, Mar 22, 2014.

  1. recoup54

    Thread Starter New Member

    Mar 22, 2014
    Figure 2-12 shows a cascaded timer circuit that uses two separate
    555 timer chips. In this circuit, both the 555 timer chips are configured
    in monostable mode, much like the circuit in Figure 2-3. The time interval for
    the first 555 is controlled by R1 and C1. For the second 555, the interval is
    controlled by R2 and C2. You can choose whatever values you want for these
    components to achieve whatever time intervals suit your fancy.
    The first 555 chip is triggered when SW1 is depressed, taking pin 2 to ground.
    This action takes the output on pin 3 to high, which lights LED1. Notice,
    however, that pin 3 of the first 555 is connected through a small capacitor to
    the trigger input of the second 555. As soon as the time interval expires on
    the first 555, its output goes low, which turns off LED1 and at the same time
    triggers the second 555,
    which in turn lights up LED2. LED2 stays lit until C2
    charges, and then it goes out. The circuit then waits to be triggered again by
    a press of the switch.

    The problem I have is that I don't understand how input 2 (trigger) of 555 (2) can get low as soon as output 3 of 555 (1) expires. The capacitor indicated with red arrow is in series with input (2).
  2. Dodgydave

    AAC Fanatic!

    Jun 22, 2012
    you need a discharge resistor in the second ic, from pin 2 to pin 8, say a 10K ohms.
  3. ericgibbs

    AAC Fanatic!

    Jan 29, 2010
    It would be usual to have a pull up resistor on pin2 of the 2nd 555.

    Consider that pin3 of the 1st 555 is high, so the left side of the coupling cap is at +V, if you now ground that charged cap to 0V on the left side, by pin 3 going low to 0V, the right side of the cap is negative with respect to 0V, so pin 2 of the 2nd 555 gets the required low going pulse.