Cadence simulation NMOS and PMOS

Thread Starter

Luiz Fernando Vieira

Joined Aug 24, 2015
Hello everyone, I'm having difficulty simulating CADENCE, NMOS AND PMOS components are NOT enabled when making modifications, such as inserting values of width or length of their structures in the schematic [schematic]. It is impossible to do the simulation.

And in the layout there is no icon or individual cell phone NWELL or PWELL.
Does anyone have this manual or guide?