Buffer (OPAMP) Problem

Thread Starter

Tarek1266

Joined Oct 18, 2019
54
Hi everyone ,
I am using this topology to buffer and offset a sinusoidal voltage reading with 9 rms voltage. while implementing this circuitry, i found that the voltage is around 0.5 rms voltage after the divider whie it should be 1.2 rms voltage. looking for help.
regards,




1632068306408.png
 

ericgibbs

Joined Jan 29, 2010
14,207
hi Tarek,
What is the source impedance of the V_ReadingIn. voltage.?

BTW: What is your equation for the 9Vrms divider to 1.2Vrms.?

E
 

Ian0

Joined Aug 7, 2020
3,772
So the input voltage is divided by 11 (R2/R3), then divided by 2 (R1/R5), then multiplied by 2 (R7/R6). Why would you expect it to be 1.2V rms?
 

Thread Starter

Tarek1266

Joined Oct 18, 2019
54
So the input voltage is divided by 11 (R2/R3), then divided by 2 (R1/R5), then multiplied by 2 (R7/R6). Why would you expect it to be 1.2V rms?
i am not seeing a 1.2 rms voltage after the divider and before entering 1IN + . this happens when i plug the opamp in the circuit. while the opamp is not plugged in, the divider shows me the 1.2 rms voltage
 

ericgibbs

Joined Jan 29, 2010
14,207
hi Tarek,
This is what LTSpice shows for your circuit.
[ please check make sure I have read your circuit correctly].

When you say Offset, do you mean you want the Vout signal to swing above 0V .?

E
ESP_ 826 Sep. 20 09.49.png
 

Thread Starter

Tarek1266

Joined Oct 18, 2019
54
hi Tarek,
This is what LTSpice shows for your circuit.
[ please check make sure I have read your circuit correctly].

When you say Offset, do you mean you want the Vout signal to swing above 0V .?

E
View attachment 248382
thanks for reply. i said offset to describe the whole functionality of the circuit. i tried LT spice to verify the concept before implementing but it seems that it is a hardware issue. the problem happens when plugging the opamp in the circuit. other with i can see the division as it should be. the voltage source was from a transformer BV020 with 180 ohm on the output
 

ericgibbs

Joined Jan 29, 2010
14,207
hi T,
With that 10k/1k voltage divider you will get 9Vrms * (1/11) = 0.818Vrms and that is what LTS shows, not 1.2Vrms as you have posted.

So, if the Vin is 9Vrms , swinging +/-Vrms about 0V, what signal do you want at Vout.?

Could you post a photo of your OPA layout, we can then check for any errors.

E
ESP_ 827 Sep. 20 14.13.png
 

Thread Starter

Tarek1266

Joined Oct 18, 2019
54
hi T,
With that 10k/1k voltage divider you will get 9Vrms * (1/11) = 0.818Vrms and that is what LTS shows, not 1.2Vrms as you have posted.

So, if the Vin is 9Vrms , swinging +/-Vrms about 0V, what signal do you want at Vout.?

Could you post a photo of your OPA layout, we can then check for any errors.

E
View attachment 248387
yes, this is true. mu fault i am using the second type with has output of 13.5 so i should have 1.2 rems voltage on the output. the issue i want to ask about is why plunging the opamp in the circuitry cause the voltage to drop after the divider from 1.2 to 0.5



https://www.digikey.be/htmldatasheets/production/105770/0/0/1/bv020-ee20-10.html
 

ericgibbs

Joined Jan 29, 2010
14,207
i want to ask about is why plunging the opamp in the circuitry cause the voltage to drop after the divider from 1.2 to 0.5
Hi,
Measure the voltage on the left side and the right side of R2, with the OPA in circuit and out of circuit.
Are you sure the 10k +1k load is not pulling the Source voltage down.??

A photo-shot would help us see what you are doing.

E
 

Audioguru again

Joined Oct 21, 2019
3,864
The TL072 opamp has Jfet inputs that have an extremely low "bias" current.
The resistor values in this circuit are very low so the opamp bias current will have no effect unless the opamps are not powered.
 

ericgibbs

Joined Jan 29, 2010
14,207
hi agu,
He has a resistive divider == 11k across the input source, we don't yet know what is the impedance of his voltage source.

We need a photo shot of his set up.
E
 
Top