So down to my questions :
1. Has anybody any experience they could share with me on using the IR2304 in this way?
2. The IR2304 is a "bootstrap mode" driver - I have been unable to find an explanation of what this means - can anyone help?
3. I have heard that this type of "bootstrap" driver will not work unless there is switching going on (i.e where the current is permanently switched on) - is this true?
The high-side part of the circuit is basically a charge pump. The BS diode, which is normally tied between Vcc and the VB pin, supplies the charge pump (while protecting the supply from current backlash) during charge time (gate off) . The cap installed between VB and VS which should be a metal poly cap for high frequency applications and needs to be rated at least 1.5X FETVcc/2 stores the charge then supplies the lag current to the FET during gate turn-on. VS is the high side supply and is tied to the junction the source of the high-side FET and drain of the low-side FET. So, in order for VS to have it's supply the high side Fet must be switching.
I have scheme that works except I haven't yet worked out an adaptive negative feedback circuit which works no matter what the FET supply is. The half bridge driver, an IR2010, isn't the same part but works exactly the same way. MAXVcc can be up to 20VDC at present.
1. Has anybody any experience they could share with me on using the IR2304 in this way?
2. The IR2304 is a "bootstrap mode" driver - I have been unable to find an explanation of what this means - can anyone help?
3. I have heard that this type of "bootstrap" driver will not work unless there is switching going on (i.e where the current is permanently switched on) - is this true?
The high-side part of the circuit is basically a charge pump. The BS diode, which is normally tied between Vcc and the VB pin, supplies the charge pump (while protecting the supply from current backlash) during charge time (gate off) . The cap installed between VB and VS which should be a metal poly cap for high frequency applications and needs to be rated at least 1.5X FETVcc/2 stores the charge then supplies the lag current to the FET during gate turn-on. VS is the high side supply and is tied to the junction the source of the high-side FET and drain of the low-side FET. So, in order for VS to have it's supply the high side Fet must be switching.
I have scheme that works except I haven't yet worked out an adaptive negative feedback circuit which works no matter what the FET supply is. The half bridge driver, an IR2010, isn't the same part but works exactly the same way. MAXVcc can be up to 20VDC at present.
