I am fed up and i can't find any clear explanation for the bootstrap capc in the L6203 h bridge.

don't tell me check the datasheet cas i don't understand what's written.
i want a very detailed and clear explanation cas i am weak in understanding how the mosfets work.

THanks in advance

 

The L6203 H-bridge DMOS driver needs bootstrap capacitors in order to be able to turn on the high side MOSFETs. If the bootstrap capacitors are not present, the high side MOSFETs will only partially turn on, the IC will overheat due to power dissipation and be destroyed.

H-bridges used to use two N-channel MOSFETs on the low side, and two P-channel MOSFETs on the high side. However, P-channel MOSFETs have a much higher gate charge (about 2.5x as much) than N-channel MOSFETs, so it is desirable to use N-channel MOSFETs for both the high and low side of the H-bridge.

Standard N-ch MOSFETs are considered OFF when Vgs (the voltage on the gate referenced to the source terminal) is below the threshold voltage (not conducting electricity between the drain and the source terminals). In order to be considered turned ON, Vgs needs to be 10v for a standard MOSFET.

However, without a bootstrap capacitor, the IC cannot raise the gate voltage higher than the supply voltage. This would cause the high-side MOSFETs to turn on until the supply voltage minus the source terminal voltage approached the MOSFET threshold voltage; the MOSFET would be in the linear region instead of the saturated region.

The bootstrap capacitor is charged via a diode when the MOSFET is off, and the low side of the bootstrap capacitor is electrically connected to the MOSFET source terminal; as the source terminal voltage increases, the voltage from the high side of the boost cap to the MOSFET source terminal stays about the same. The boost capacitor keeps the MOSFET turned ON even when the source terminal is the same as the supply voltage; and the top of the boost capacitor to ground will measure higher voltage than the supply voltage.

 

Thanks a lot sgt for your detailed explanation. That was very helpful for me.
I understood most of the points but i am still a bit confused.

You mentioned that in order to Turn ON the MOSFET i need Vgs > Vt
but why do i need the Vg > supply voltage. does the supply voltage means V at drain ?

i know that the saturation region's conditions are when

VDS > VGS – VT or VGD < VT ​

can u re explain the following paragraph if you don't mind. i'll be very thankful if you added an example with numbers to understand it better.

Thanks a lot for you time

However, without a bootstrap capacitor, the IC cannot raise the gate voltage higher than the supply voltage. This would cause the high-side MOSFETs to turn on until the supply voltage minus the source terminal voltage approached the MOSFET threshold voltage; the MOSFET would be in the linear region instead of the saturated region.

 

OK, let's try to explain it another way, and just talk about one upper MOSFET.

Let's just say you are powering the circuit from a 15v supply, and it's time to turn on the high-side MOSFET. Initially, you can raise the gate voltage to 15v, as that's the limit of the power supply voltage. So, the MOSFET starts turning on, supplying current to the load.

But, what happens when the MOSFET drain gets higher than, say, 10v? Vgs is now reduced to 15v-10v, or 5v! A standard MOSFET needs a Vds of 10v to be considered fully turned on.

As the voltage at the drain continues to rise, Vgs continues to fall, so the MOSFET gets closer and closer to the conduction threshold; it essentially becomes a variable resistor controlled by the Vgs, instead of the saturated switch that you need.

One answer is to add a capacitor that is connected on the low side to the high-side MOSFET's drain. As the MOSFET's drain voltage increases towards the supply voltage (relative to the circuit ground), the voltage across the capacitor itself remains constant.

It's sort of like carrying a bucket of paint up a ladder to pain the ceiling. Sure, you could leave the bucket of paint on the floor, but you would certainly get warm running up and down the ladder to refill the paint brush every minute. When you carry the bucket of paint up the ladder (and are careful to not spill it), the level of paint in the bucket stays the same.

It might help you to download a SPICE simulator and experiment with it. LTSpice is good and free, available at http://www.linear.com
There is an LTSpice Users' Group on Yahoo! Groups; a great many SPICE models are available for free download, and there is help in case you get "stuck" on something in the forums. You need to sign up for the group, but there is no cost to do so.

Here is a helpful document that describes a number of MOSFET driving techniques:
http://focus.ti.com/lit/ml/slup169/slup169.pdf
The basic bootstrap gate drive technique is discussed beginning on page 22, near the bottom of the left column. The entire document is well worth reading.

 

sorry but i am still confused

i know that when Vgs > vt the mosfet will be On

but the linear & saturation conditions are not clear

according to the I vs Vds graph i know that saturation occurs when Vds increases. and also to increase current Id i need to increase Vgs.

so saturation occurs when Vds increases and according to that the condition is VDS > VGS – VT or VGD < VT

u maintained that Vg = 15 & Vd = 10
now Vgd = 15-10 = 5, so Vgd < vt assume Vt = 10
if Vd continues to increase to reach 20, Vgd = 15 - 20 = -5 so Vgd < vt
continuing like this and increasing Vd we are in the saturation region

am i correct or am i missing things up ??

Does the calculation differs when i am dealing with a cascoded design where the Source not equal to Zero

sorry for this mess but am trying to understand

 

sorry but i am still confused

i know that when Vgs > vt the mosfet will be On

but the linear & saturation conditions are not clear

Vt is where the MOSFET is considered beginning to conduct; usually around 250uA. Vt can and will vary from MOSFET to MOSFET. Vt is the beginning of the linear region; where the MOSFET dissipates power as heat.

Saturation occurs when an increase in Vgs does not result in a corresponding increase in Id. For standard MOSFETs, this is usually 10v. Logic-level MOSFETs are usually considered saturated at 4.5v to 5v.

according to the I vs Vds graph i know that saturation occurs when Vds increases. and also to increase current Id i need to increase Vgs.

There is a point of diminishing return. Also, if Vgs exceeds +20v/-20v, many MOSFETs will be destroyed.

so saturation occurs when Vds increases and according to that the condition is VDS > VGS – VT or VGD < VT

Don't even worry about Vt when talking about saturation. Just look at the Id specification; it will give Id when Vgs= (some value).

u maintained that Vg = 15 & Vd = 10
now Vgd = 15-10 = 5, so Vgd < vt assume Vt = 10
if Vd continues to increase to reach 20, Vgd = 15 - 20 = -5 so Vgd < vt
continuing like this and increasing Vd we are in the saturation region

am i correct or am i missing things up ??

Without a boost cap, Vg cannot go higher than the supply voltage; if the supply voltage is 15, then Vg will never exceed 15v. As Vs increases as the load current increases, Vgs will decrease, so the MOSFET will fall out of saturation into the linear region, and will begin dissipating power as heat.

The boost cap allows Vg to increase along with Vs, so that MOSFET saturation is maintained.

You are getting confused. Don't let that happen. Keep it simple.

My time on the Forums is very limited.

You need to experiment with this type of thing using a SPICE simulator. Perhaps that will help ease your confusion.

 

Have a look at the attached circuits and simulation.

There are two circuits:
The one on the left has a simple MOSFET driver, but no boost cap.
The one in the right has a boost cap, C1, that is charged via the Schottky diode D1.

V(g1, s1), the green trace, is the Vgs of M1, the left MOSFET. Notice that it is very low in aplitude compared to V(g2,s2), the yellow trace on the bottom plot; that's the Vgs of M2. In this example, the Vgs of M2 goes from ~0v to ~15v.

The red trace is the power dissipation in M1. Note that it exceeds 5 Watts, with only a 1A load. This means that the MOSFET has over a 5v drop with a 1A load when the supply is 15v; that's over 1/3 the total power used in the circuit. It gets much worse with higher load currents.

The violet trace in the bottom pane is the power dissipation in M2. Notice that except during switching, the power dissipation in M2 is well under 1 Watt.

You should create circuits like this using a SPICE program and experiment for yourself to see how they work.

 

sgt you're the best. sorry i didn't follow the thread but thank you very much for your great help. it's clear now for me