Boolean function simplification and implementation, MMExer3.19a

Georacer

Joined Nov 25, 2009
5,182
I think I answered that question in this post (http://forum.allaboutcircuits.com/showthread.php?t=63147).

Generally, I find those "solutions" you have found rather unprofessional. Are they from a book of yours or from some slides your professor has given you? I suggest you stick to what you "feel" that is correct, and not to what you are told is correct.
Personally, I will stick to what I 'm posting, until I 'm challenged by someone proving me wrong.
 

Thread Starter

PG1995

Joined Apr 15, 2011
816
Thank you.

That was a different problem.

The solutions are from 'professional' solution manual published Pearson Education for the book Digital Design by Morris Mano.

Best regards
PG
 

Georacer

Joined Nov 25, 2009
5,182
Which edition of the book are the solutions from? Generally the Morris Mano book is very high quality. Most of my digital knowledge comes from this book actually.

In the other thread I linked to, I gave you the method of extracting the NAND and NOR circuits from boolean expressions. Was it too complex? Do you want me to break it down more?

Give it a try for this and the other problem and post your work.
 

Thread Starter

PG1995

Joined Apr 15, 2011
816
Hi GeoRacer

It's 4th Ed. Have you used Digital Fundamentals by Floyd. I find Floyd's book more straightforward. In the past I have shunned the Morris Mano's as much as I can. But if you say, it's a good one, I would give it a try. :)

No, sorry. You see, I checked your reply to the other linked thread after I had posted this thread. You have given a general method there. I will read it thoroughly and then ask you any question if there is one. Many thanks.

Best regards
PG
 

Georacer

Joined Nov 25, 2009
5,182
Never read Floyd. Probably never will, but I might check on it if I 'm too curious. Don't feel constrained by one tutoring source. What doesn't work for one man may do wonders to another.
 

Thread Starter

PG1995

Joined Apr 15, 2011
816
Hi

Please have a look on the attachment and let me know if my solution is correct. Thank you.

Regards
PG
 

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Georacer

Joined Nov 25, 2009
5,182
What method did you use to get to your result? I don't see any reasoning to it.

There are several mistakes in your solution.
First of all, the expression (Y')(X'+Z')(W+X') isn't a valid expression for F. Take for example the input WXYZ=0100 gives a result of (0')(1'+0')(0+1')=1(0+1)(0+0)=0=FALSE, where, based on the K-map we should have a F(0100)=TRUE.

Please be more methodical in your solutions.

Take another read here:
If you want a NOR circuit, you have to work with the F' (maxterm) representation:
F=(F')'=(BD+BC)'
=(BD)'(BC)'
=(B'+D')(B'+C')

Now you double negate this form and get what you wish:
F=(((B'+D')(B'+C'))')'
=((B'+D')'+(B'+C')')'
=(B' NOR D') NOR (B' NOR C')
which is a NOR circuit.
What this says is that you find the minimal SoP expression for the F' expression and then negate it to find the NOR circuit.

Let's do this one together, using your K-map:
F'=w'z+xz+wxy
Now we negate the expression to get
F=(F')'
=(w'z+xz+wxy)'
=(w'z)'(xz)'(wxy)'
=(w+z')(x'+z')(w'+x'+y')
and then
F=((F)')'
=(((w+z')(x'+z')(w'+x'+y'))')'
=((w+z')'+(x'+z')'+(w'+x'+y')')'
=NOR( NOR(w,z') , NOR(x',z') , NOR(w',x',y'))

It's tedious, but at least I, don't know any other algorithmic way.

The other issue about your effort I 'd like to address, is that you couldn't replicate the expression F=y'(x'+z')(w+x') in a circuit.

The circuit you posted is for the expression ((x'+z')'+(x'+w)'+y')'. That is because the last gate on the right is a NOR one, not an AND.

Can you work the same results as me and post a correct circuit? I 'll search for some gate resources if you have trouble with them.
 

Thread Starter

PG1995

Joined Apr 15, 2011
816
Thanks a lot, GeoRacer, for the reply.

Please have a look on the attachment and please let me know what you think. Once again, many thanks. It seems your method is more general but the that method also works for two-level implementation. The book also says for two-level NAND implementation you need to have circuit in SOP form.

Best regards
PG
 

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