hi guys,
I have

X = A'B + CD + AD'

I need to implement X using 2 inputs NAND Gates

This is wat I get

((A'B)' (CD)' (AD'))'

However as u can c, there is a need to use 3 inputs NAND gate. How to further simplify it?? Thanks

 

Originally posted by yagmai@Aug 27 2005, 03:30 AM
hi guys,
I have

X = A'B + CD + AD'

I need to implement X using 2 inputs NAND Gates

This is wat I get

((A'B)' (CD)' (AD'))'

However as u can c, there is a need to use 3 inputs NAND gate. How to further simplify it?? Thanks

[post=9966]Quoted post[/post]​

Is there a limit on how many NANDs you may use? I have a solution that uses 8 2-input NANDs. 3 of those are simply NAND-connected inverters (i.e., a NAND with both inputs shorted to mimic an inverter).

You'll find that the easiest way to do problems like this is to use "graphical DeMorganizing" (that's my term, I don't know what others call it). To quickly DeMorganize with this method, you change the basic gate from AND to OR or OR to AND, depending on what you have, and you invert the bubble status- that is, wherever you have bubbles, omit them, and where you don't have them, put them in. For example, an AND becomes an OR with bubbles added to all inputs and the output. This allows "cancelling" of bubbles in series, and certain other reductions/simplifications. Give it a try, it's not hard. Good luck!

 

Here is the result:

 

Originally posted by dragan733@Sep 3 2005, 02:10 PM
Here is the result:

[post=10118]Quoted post[/post]​

CUTE schematic! What editor did you use?