Boolean circuit diagram help

Thread Starter


Joined Oct 7, 2008
I think i got the right answer on the Boolean equation diagram, but i need someone to check my work. The question states to draw a circuit diagram for the following equation.

A'C'D + BC'D + A'BD + AB'CD

My diagram has three 3 input AND gate, a 4 input AND gate, 5 inverters and 3 OR gates. Correct?


Joined Feb 4, 2008
You dont need 3 OR gates, you need one with four inputs. However, if you dont have one you can use 3 2-input OR gates to make a 4-input gate.

Thread Starter


Joined Oct 7, 2008
Would anyone happen to have the book by Texas Instruments called TTL Logic Data Book to reference the chips that i got? I chose the 74LS04 as the inverter. The 74LS11 as the triple 3-input AND gate. A 74LS21 as a dual 4-input AND gate. And a 74LS32 as the quadruple 2-input OR gate. The only question i have is what would the output be?


Joined Oct 29, 2008
are you using De Morgan's theorem already? if so it would be different, if not then that is correct (if it doesn't state how many inputs the gates have then you can use 4input OR's and AND's)

you don't need all the OR gates, you can use only 1, and the 2 AND gates can be replaced by 1 AND gate which I drew, depending on your professor is what you would have to draw.


Joined Feb 7, 2008
The benefit of using a K-map is that you can quickly derive an equation with only two levels of logic, resulting in a fast circuit. MareBear's diagram, while it may have fewer gates, has four levels of logic propagation.

It's a tradeoff between space/cost and speed/ease