# Binary Up Down Counter Project HELP

#### BeenJamin

Joined Nov 7, 2012
18
I have been assigned a group project, unfortunately my group members don't really do anything, so its up to me to try to figure things out. The project discription is: It must have a counter that counts up to 9 then switches direction and counts from 9 to 1. After the count the counter shuts off.

The display is a 7 seg. display.

I already know I will need a 74192 up/down counter and a 7447 driver/decoder, but I am confused on how to actually get the counter to cycle through the whole process and stop at the end automatically.

Any Help would be apprieciated.

Thanks

#### Wendy

Joined Mar 24, 2008
22,581
The Completed Projects Forum is for Completed Projects only. It is meant to allow members to show plans for projects they built so other members can duplicate them if desired. New threads are also automatically moderated per Moderator review for this reason. Your thread does not belong in this forum, and was moved here.

Hint: We do not answer questions directly on these kind of problems, but you will need a set/reset flip/flop to control direction of count, and two 4 bit gates to set/reset the flip flop.

#### JDT

Joined Feb 12, 2009
657
Let me just check what you are trying to do here:-

Switch on power. Seven segment display goes 0 - 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 8 - 7 - 6 - 5 - 4 - 3 - 2 - 1 then stops there. Correct?

Does it change on a button press or just by itself with an internal clock pulse?

Do you have to use 74 series logic?

Can you use CMOS?

Even better, could you do this with a small micro-controller such as a PIC?

Answer these and I might be able to make some suggestions.

#### t06afre

Joined May 11, 2009
5,934
I think in this case the borrow and carry output will be very useful. By using some flip-flops the may be used to control which one of the count inputs, who shall receive the clock signals

#### BeenJamin

Joined Nov 7, 2012
18
Bill-Thanks for the hint!

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#### BeenJamin

Joined Nov 7, 2012
18
jdt- yes that is what I am trying to do. And it must be automatic no button pressing. It has to be 74 logic. and I cant use Micro-controllers

#### crutschow

Joined Mar 14, 2008
27,907
You need to use some logic and flip-flops to detect the count limits and then use that to control the direction of the up/down counter.

Generate a flow diagram the shows the sequence of events and then design the logic that will implement that sequence.

#### JDT

Joined Feb 12, 2009
657
I think a 74192 might be a good place to start. Google for the data sheet. And a 7447 BCD to 7-segment driver.

Amazing how I can still remember these part numbers!

Can you generate the clock using a 555? Is that allowed?

And, yes, you will need some gates and flip-flops.

#### BeenJamin

Joined Nov 7, 2012
18
JDT- yea I have a breadboard companion to generate the clock so that is no problem. I have got the 74192 and 7447 all hooked up its just the flip flop part im am confused on, to get it to count up count down and stop.

#### t06afre

Joined May 11, 2009
5,934
JDT- yea I have a breadboard companion to generate the clock so that is no problem. I have got the 74192 and 7447 all hooked up its just the flip flop part im am confused on, to get it to count up count down and stop.
As said before have you looked at the carry output of the 74192? Think about how this can be used to set a flip flop. In order to control which of the count up/down pin who shall receive the clock signal

#### takao21203

Joined Apr 28, 2012
3,702
Why don't you use a controller anyway?

A 16f59 costs $1. TQFP44 adapter PCB costs$1.
So you don't even need a breadboard.
You can also directly connect a 4-digit LED display. Another $1.50. #### t06afre Joined May 11, 2009 5,934 Why don't you use a controller anyway? A 16f59 costs$1. TQFP44 adapter PCB costs $1. So you don't even need a breadboard. You can also directly connect a 4-digit LED display. Another$1.50.
Because this is a school assignment that require use of digital logic building blocks. The teacher is not asking for MCU project

#### takao21203

Joined Apr 28, 2012
3,702
Because this is a school assignment that require use of digital logic building blocks. The teacher is not asking for MCU project
Yes maybe the teacher is not asking for MCU. However in product brochures, the information can be found for instance baseline PICs are intend to replace traditional digital logic.

Also MCUs contain a counter: the timer. What's the matter if you build a 7-segment decoder with chips, or if you program it in software?

For both ways, you need to understand it properly.

#### t06afre

Joined May 11, 2009
5,934
What's the matter if you build a 7-segment decoder with chips, or if you program it in software?
Nothing wrong in that, but still. I do not think the teacher in this case would aprove such a project

#### JDT

Joined Feb 12, 2009
657
You need to download and read the data sheet of the 74192 very carefully. Understand how it works.

Also get the data sheet for the 7474 dual flip-flop. You will also need various gates and inverters so the old Texas Instruments TTL data book would be useful if you can still find it! Most people have chucked them out!

Hope this will get you started:-

You will see that there are 2 clock inputs on the 74192: one counts up (pin 5), the other down (pin 4). They both clock on the low-to-high (rising edge) of the clock pulse. Connect 2 gates controlled by a flip-flop (half a 7474) so that the counter counts up or down depending on the state of this flip-flop. You have to be careful that switching the clock input does not itself clock the counter. This means you have to change the direction when the clock input is high.

The 74192 has a carry output (pin 12) that goes low when it reaches the count of 9.

Arrange your circuit so that when this happens the counter direction flip-flop changes state. Note that the counter changes on the rising edge of the clock and your "direction" flip-flop needs to change on the falling edge so that it is ready in time for the next rising edge.

Use the other flip-flop and the borrow output (pin 13) to stop the counter when it gets back to zero.

You won't be using the parallel inputs so ground these and connect the PL load to +5V.

#### MrCarlos

Joined Jan 2, 2010
400
Hello BeenJamin

I'd like to help in your project.

As I understand, you intend to do an up counter from 0 to 9, then descending to count from 8 to 1 and stop the counter.

Have you done that counter?

regards

#### BeenJamin

Joined Nov 7, 2012
18
This is what I have so far. Not too sure where to go from here.

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#### MrCarlos

Joined Jan 2, 2010
400
Hello Beenjamín

I see you use Multisim to develop your circuits.
Very good, however there are missing some connections in the circuit that you enclose.

I use Proteus ISIS. Occasionally Multisim II.

Certainly TCU(12) and TCD(13) outputs are used to achieve the goal.
And also the Inputs UP(5) and DN(4) to have the counter up or down.
Then a circuitry with a J-K Flip-Flip, in my scheme, And some gates are used to develop the circuit.
It might have been easier with a Toggle Flip-Flip type.

Note how through some OR gates are allowed to pass the 555 pulses to the counter.
If the Q of flip-flip is a low level pulses to the counter will pass right through the OR gate U3: A
and the counter will count ascending

As the Q of flip-flip is low consequently its negated Q is high thus will disable the OR gate U3: B.

Normally TCU(12) And TCD(13) outputs are at high level so that the AND gate U8: A will output a high level.

As soon as the counter reaches 9 TCU (12) will be low and the AND gate U8:A will have at its output to a low level.

This will make our Flip-Flip to change state so now have a Q high and Q negated low thus far the pulses pass right through the OR gate U3: B.

Another important thing happens with our counter.
As the gate U8:A low level generated at its output and this output is also connected to the input PL(11) of the counter, the data in their inputs D's will going to its Q's.
Note that these inputs D's have programmed an 8(Decimal) 1000(Binary).
D0 = 0
D1 = 0
D2 = 0
D3 = 1
So the counter will count downward from 8 to 1.

As soon reaches the counter to 1, all inputs NOR gate U5:A will have a low level so that its output will have a high level that disables the OR gate U3:C and since the 555 pulses cant cross the right through OR gate U3:C the counter stops.

Notes:
Statute of the OR gate:
Any high level in any input will give a high level at the output. The other inputs no longer affect the output.

Statute of the AND gate:
Until all entries have high level its output will be high, so any low level in any input will give a low level at the output. The other inputs no longer affect the output.

Statute of the NOR gate:
Until all its inputs are low the output will have a high level. So any high level in any entry its output will be low. The other inputs no longer affect the output.

Take in consideration that the names of inputs and outputs differ in Multisim and Proteus ISIS. Any way the PIN numbers are the same.

Develop Your design based on mine.

regards

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#### JDT

Joined Feb 12, 2009
657
OK, you've made a start. I like the fact that the carry and borrow outputs of the counter go to the D inputs of the flip-flops. These flip-flops need to be clocked on the opposite edge to the one that clocks the counter.

Now you need an arrangement of gates where the inputs are

• The clock oscillator
• The flip-flop outputs
And the outputs of the network of gates go to the counter up and down clock inputs.

The systematic way to do this is with a truth table and logic equations. Or you could break it down into stages and experiment (guess).

What did you use top draw your diagram? Have you got any logic simulation software? I you have you can experiment without building an actual circuit until got it right.

#### BeenJamin

Joined Nov 7, 2012
18
OK, you've made a start. I like the fact that the carry and borrow outputs of the counter go to the D inputs of the flip-flops. These flip-flops need to be clocked on the opposite edge to the one that clocks the counter.

Now you need an arrangement of gates where the inputs are

• The clock oscillator
• The flip-flop outputs
And the outputs of the network of gates go to the counter up and down clock inputs.

The systematic way to do this is with a truth table and logic equations. Or you could break it down into stages and experiment (guess).

What did you use top draw your diagram? Have you got any logic simulation software? I you have you can experiment without building an actual circuit until got it right.
I used MultiSim for this. thanks for all the help!! It is much appreciated during this crunch time.