The Arithmetic Logic Unit (ALU) operates on signed numbers, which are expressed as 2’s complement. Design a circuit, which will convert a binary input to its 2’s complement equivalent. Limit the number of bits to 4.

Does this mean it doesn't have to give signed numbers at the output? Because to convert to two's complement I used half adder with Cin shorted to Cout. First Cin is given a 1 and each input inverted first. While if the circuit is to be able to represent signed numbers it would be slightly different which I managed to build but not with a truth table (attached). What do you think he wants exactly?

 

It is a mistake to short an input wire (Sign Option) with an output of a gate (the OR output). What was wrong with your other circuit on the thread http://forum.allaboutcircuits.com/showthread.php?t=48854 ?
Just leave the N0 MSB out to limit your number to 3 bits + sign. The Cout of M2 is unneeded as the 2's complement action doesn't overflow.