It's actually a LAB experiment. After generating the truth table of BCD to 7 Segment Decoder, and obtaining the Boolean expressions in SOP and canonical SOP form, i am stuck on this question :

" Show how the circuit can be designed using MSI components such as Multiplexers and individual logic gates, explaining the choice of the selected multiplexers. "

Please help.

 

The 3 select lines of an 8:1 multiplexer are the Boolean inputs. The 8 data input lines are the outputs associated with each of the 8 combinations of the 3 Boolean inputs. Now whatever the values of the select lines (A,B,C) the output of the multiplexer assumes the correct value of the function. Multiplexers can of course be cascaded to realize more complicated functions. There are also Dual 4:1 and 16:1 multiplexers for your predilection and amusement.

 

The 3 select lines of an 8:1 multiplexer are the Boolean inputs. The 8 data input lines are the outputs associated with each of the 8 combinations of the 3 Boolean inputs. Now whatever the values of the select lines (A,B,C) the output of the multiplexer assumes the correct value of the function. Multiplexers can of course be cascaded to realize more complicated functions. There are also Dual 4:1 and 16:1 multiplexers for your predilection and amusement.

But in the truth table of the BCD to 7, there are 4 inputs not 3 inputs (which will ultimately be associated to the select lines ) ??

That's my truth table :


Binary Inputs Display Outputs Decoder Outputs
D C B A HEX a b c d e f G
0 0 0 0 0 1 1 1 1 1 1 0
0 0 0 1 1 0 1 1 0 0 0 0
0 0 1 0 2 1 1 0 1 1 0 1
0 0 1 1 3 1 1 1 1 0 0 1
0 1 0 0 4 0 1 1 0 0 1 1
0 1 0 1 5 1 0 1 1 0 1 1
0 1 1 0 6 1 0 1 1 1 1 1
0 1 1 1 7 1 1 1 0 0 0 0
1 0 0 0 8 1 1 1 1 1 1 1
1 0 0 1 9 1 1 1 1 0 1 1
1 0 1 0 A X X X X X X X
1 0 1 1 B X X X X X X X
1 1 0 0 C X X X X X X X
1 1 0 1 D X X X X X X X
1 1 1 0 E X X X X X X X
1 1 1 1 F X X X X X X X


There are 7 Decoder outputs. How will there be 8 outputs, for an 8:1 MUX?
I am confused.

 

I did not say you could do it with one chip. Each 8:1 multiplexer is good for one Boolean function with 8 inputs and 1 output. You combine them in whatever way you need to get the functions you want. You need four inputs and 7 outputs. Does that clear things up a bit. I also did not say that it was a reasonable thing to do nowadays. Once upon a time - maybe, but not now.

 

If you want to do the LAB experiment, then you may study the internal logical structure of 74LS47 and CD4511, and then you can find the logic's IC to Combined into a decoder as your wish.

74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs from FairChild.
http://www.datasheetcatalog.org/datasheets/70/375646_DS.pdf

CD4511 BCD to 7 Segments from TI.
http://www.datasheetcatalog.org/datasheets/270/109523_DS.pdf

List of 4000 series integrated circuits,4500..
http://en.wikipedia.org/wiki/List_of_4000_series_integrated_circuits

List of 7400 series integrated circuits.
http://en.wikipedia.org/wiki/List_of_7400_series_integrated_circuits