Hi all,

First post on here, been poking around awhile and finally signed up. Hopefully I can get some insight on this problem I've been tinkering with for awhile.

Here's the deal. I have two 12v batteries in series. I want to charge the top battery (secondary) with the bottom battery (primary). The general traffic cop of the circuit is a comparator. The comparator checks 3 things.

1. If the primary battery is above 10V.
2. If the total circuit voltage is above 20V.
3. Which battery has more voltage.

When all three of those things are true (Check #3 being the primary is higher than the secondary) then those are diode summed together to allow R9 to be pulled up. This makes the fourth comparator go low to enable the charger (DC-DC converter).



All of it works except for some oscillation on check #3. Here's my analysis so far.

Problem:
When disconnecting secondary battery from circuit, while charging, the charger goes into oscillation.

Reason:
When the battery is charging, the pri/sec comparator has a high output. Disconnecting the battery allows the charger to shoot to open line voltage, 15V. The pri/sec comparator now thinks the secondary battery, +24v/4, is charged and outputs low. This turns the charger off. Once the +24v/4 line drains below +12v/2 the comparator thinks the secondary battery is lower than the primary and outputs high, resulting in it charging and this repeats.

Note 1:
The second comparator, comparing +24v/4 and +5v is supposed to catch if the total voltage is below 20V. Since the primary can only be charged up to 15V max this is supposed to catch the absence of a secondary battery.

I was thinking if I could slow down the switching of the comparator, I could give the +24v/4 line enough time to drain below the #2 check and bypass check #3 oscillating. I can also slow down the switching of the charger FET. I don't care how slow any of this works. It could be 5 seconds between states haha! I'm just not sure how to slow it down without a bunch of extra parts.

Thanks for reading!

 

The input common mode range of U1 is limited to VCC+5V, which in your case is 17V. Pin 6 has 24V on it.

Fix that first and try it. I didn't analyse anything else.

Regards,
Ifixit

 

Pin 6 is the divider value of R5 (3M) and R6 (1M). It's 25% of the total voltage. I was shooting to see what the total voltage was compared to 20V. So 25% of the total voltage compared to 5V reference, goes in the inputs.

 

Your voltage divider uses 6ua from the 24V point so you can permanently connect a capacitor to the battery charger terminals at 6uf per volt per second.

15 volts dropping to 12 volts is 3 volts difference. A 22uf cap would give you
22/6 X 3 seconds = 11 seconds.

Maybe my assumptions are wrong, but I gave you an idea and the math. I think you have enough education to apply this even if I made a mistake.

 

Hi Routybouty,

Yes, I see where I went wrong, the input levels should be okay.

I assume you don't want to add any components. I don't think R10 is required, so to slow the turn on and off of the FET you can replace R10 (5K) with a 1u to 10u cap to delay charging until the 24V has fallen low enough to trigger the second check to a fail condition.

Worth a try?

Ifixit

 

Your voltage divider uses 6ua from the 24V point so you can permanently connect a capacitor to the battery charger terminals at 6uf per volt per second.

15 volts dropping to 12 volts is 3 volts difference. A 22uf cap would give you
22/6 X 3 seconds = 11 seconds.

Maybe my assumptions are wrong, but I gave you an idea and the math. I think you have enough education to apply this even if I made a mistake.

Thanks for the input, but this is backwards from what I need, if I understood you correctly. I probably didn't explain it just right. It's easy for me as I've been staring at it for awhile, and you guys are just seeing it haha!

The problem is when you disconnect the secondary battery the 24v line can't drain fast enough and triggers #3 comparator check (this was a design oversight ) and renables the charger. I need that line to drain faster than the system can react to correct it, so that the #2 check can see <20V and fail.

 

I assume you don't want to add any components. I don't think R10 is required, so to slow the turn on and off of the FET you can replace R10 (5K) with a 1u to 10u cap to delay charging until the 24V has fallen low enough to trigger the second check to a fail condition.
Ifixit

In my original design I didn't have R10, but a colleague suggested it to make sure the FET remains off, as a safety. I agree it's not really needed. A cap in R10 sounds way to easy. I will try that! It sounds and looks so simple now that you pointed it out. I'll play with the R11 value and the cap value to get the correct delay. I hope that slowly turning on the FET doesn't add some unwanted action. We will see!

This sounds like a promising fix and I'll give it a shot tomorrow at work where I have better tools for 0603 parts .

Thanks guys, will post results.

 

Oops. Read my signature line.

 

No worries! Thanks for the input!

 

Are you considering the effects of the positive feedback around the comparators? What are the values of those resistors?

 

I have played with them a bit. Although since my input impedance is so high, I have really high value hysteresis resistors. I have some in there at about 40M to give me roughly the response I wanted. I will probably end up having to coat the board since the values are so high to have consistent behavior in different humidities.

 

Alright, late night at work to get some tinkering in! I added 1uF of capacitance in place of R10 and changed R11 to 100k to exaggerate the results. I also put a diode across R11 so the FET would turn off faster than it turned on.

This was my result:



Ch 1. Yellow - Q1 Gate voltage
Ch 2. Blue - U1 Pin 7, Pri/Sec battery voltage comparator
Ch 3. Purple - Vin of U2
Ch 4. Green - 24V line

So when I remove the secondary battery, it still oscillates. Although I think for a slightly different reason than I though before. While I think I'm still on the right track, I believe another issue may be the bigger cause.

The picture explained:

With the battery removed the 24V line shoots high (green) because of the open load voltage (not really seen in the picture, unless you know where to look). The Pri/Sec battery voltage check (#3) sees the line go high and goes low (blue). The FET gate voltage goes up (yellow) and the FET begins to shut off. When the FET finally does turn off, the 24V (green) and the Vin U2 pin 2 (purple) begin to fall.

The comparator sees the 24V line (green) drop below it's threshold and goes high (blue). You can then see the FET gate voltage (yellow) begin to go back down to turn on the FET, slowly. This is where I don't have enough time for the check #2 to fail. I believe the FET is then starting to turn on and allowing the DC-DC device to spaz out a bit trying to grab enough start-up current. It starts bumping back up the 24V line and then it just repeats.

Thoughts:

I believe the FET is not being shut off hard enough or at least it's coming on way too easy. I might go back to my original values (maybe a 1k in R10, 5k in R11) as shown originally and attack the enable (RC) pin on the DC-DC device, instead of the FET. I will probably do a similar tactic and have it shut off quickly, but turn on slowly.

Here's my little dude (DC-DC converter is on the backside):

 

Why is this oscillation a problem?
Won't you get a similar oscillation when the secondary battery voltage exceeds the primary battery voltage?

 

The primary has a larger load than the secondary (excluding any load from this circuit). So this circuit will just top off the secondary every once in awhile, if it's there. That's hope anyway.

 

The primary has a larger load than the secondary (excluding any load from this circuit). So this circuit will just top off the secondary every once in awhile, if it's there. That's hope anyway.

Were those the answers to my questions?

 

Can you remove C3 and ensure there is a load attached to +24V. This will help the check for a missing battery win the race and keep the charger off. Removing C3 also increases the speed with which the hysterisis takes effect.

Regards,
Ifixit

 

Were those the answers to my questions?

Yes. I guess I consider "once in awhile" (days) and oscillation (milliseconds) two different things. The oscillation I'm seeing is a mode the charger should not be in. It's trying to charge a battery that isn't there. When it is there, the primary has more load than the secondary, it will sag lower. Every once in awhile, the secondary gets used and my circuit should charge it back up above the primary, I hope!

ifixit - I did try removing C3 at one point and I didn't notice an improvement. It was awhile ago and I didn't have some of the other changes in place. I may revisit that option. I want to try apply your idea of the slow charging FET gate to the RC pin instead. I believe this will give me better results.

 

Maybe I'm missing something. It appears that the path from U1-7, through U1-8, Q1, U2, and back to U1-6 is a negative feedback loop with lots of delay. That is a natural oscillator unless you introduce a latch in the loop, or somehow do some amazing compensation.