ASIC Physical Design:: transition values in libraries

Discussion in 'General Electronics Chat' started by smatit, May 5, 2011.

  1. smatit

    Thread Starter New Member

    May 5, 2011
    In the timing libraries used in ASIC sta the transition tables are normally extrapolated to 10%~90%. WHY?

    The delay calculator has to again multiply the values in transition table by slew_derate_from_library to get the transition_value for the actual characterised portion of the waveform and use it for delay calculation.
    Why in first place the actual transition values for the characterised say 30%~70% not written in the libraries?
    Could some one help me understand?
  2. Another Er

    New Member

    Dec 2, 2014
    Need for slew derate
    Signal slew rates for process nodes 180nm or above were linear between 10 and 90 percent of their rail voltages. This linearity drove the choice of slew thresholds between 10 percent and 90 percent. This linearity was reduced to a band of 20 percent and 80 percent for nodes between 180nm and 65nm. It was further reduced to 30 percent and 70 percent.

    Latest transition band 30-70 percent is only 40 (70-30) percent of rail voltage, hence misrepresents slew rate between rail voltage. Need to translate this new band to a reasonable (more than 50 percent) percentage of rail voltage gave birth to slew derate.