I am having trouble understanding the timing diagrams. The data sheet says that data is ready after "access time" from the rising edge of the read clock. But when is that? The diagrams suggest it is late in the cycle. The data sheet says that the "maximum" (at 3.3v) is 15ns. So I am confused. I would also like to understand the setup times for read reset and read enable. The data sheet specifies a "minimum," but the diagrams suggests that these times are longer. Help is appreciated.