aimspice cmos amplifier

Discussion in 'General Electronics Chat' started by juvin07, Mar 4, 2011.

  1. juvin07

    Thread Starter New Member

    Oct 14, 2008
    i am simulating cmos common source amplifier using aimspice , i want to perform pole zero analysis . i have following coding :

    common source amplifier
    vdd 2 0 dc 2
    vin 3 0 dc 1.2
    m1 1 1 2 2 ptype l=2u w=8u
    m2 1 3 0 0 ntype l=2u w=4u
    .model ptype pmos(level=2 vto=-0.5 kp=8.5e-6 gamma=0.4 phi=0.65 lambda=0.05 xj=0.5e-6)
    .model ntype nmos(level=2 vto=0.5 kp=24e-6 gamma=0.15 phi=0.65 lambda=0.015 xj=0.5e-6)

    but every time i perform pole zero analysis by giving output node as 1 0 and input node as 3 0 ,

    error comes out as "Circuit: common source amplifier

    doAnalyses: The input signal is shorted on the way to the output

    run simulation aborted "

    please suggest me solve this problem.
    thank you