Hi I am working on a project related with a design of a capacitor. I doing my works on agilent software. I want to ask that with the frequency changing I am having a change in capacitance. Why is this happening? Well the impedance of a capacitance simply change because it also has a parameter of frequency but directly looking at capacitance => C=E.A/d why does it change with frequency?
A graph that I've plotted is attached and I am quite having trouble with interpretation of it. Hope this'll be a fine discussion. thnx for any contribution

FYI this is a parallel plate capacitance plot with perfect conductor and dialectric

 

A real capacitor will also have parasitic properties of R and L (series and parallel).
The higher in frequency you go, the more the parasitics come into play.

A multilayer ceramic capacitor that normally measures 200pF at low frequencies (below 20MHz) may appear to double or triple it's value at 500MHz.

 

Well here we have a perfect dialectric and a conductor. Still shouldn't I neglect the parasitic effects?

 

It's only reasonable to neglect things which do not have dominant effects. Even if your dielectric and conductors are lossless (a tall order for the conductors), parasitic inductance may be significant, in the capacitor or in the connections to it. By the time you get to a GHz, an inch long wire of maybe 20nH inductance would have tens of ohms reactance.