adder in ise12.1 schematic

Discussion in 'Embedded Systems and Microcontrollers' started by maia31, Jul 27, 2011.

  1. maia31

    Thread Starter New Member

    Jul 20, 2011

    how can i use 24 bit adder with enable pin in ise 12.1?​
  2. guitarguy12387

    Active Member

    Apr 10, 2008
    Lots of ways. Draw one in the schematic. Roll your own using HDL. Probably the easiest thing to do will be to use CoreGen to do all the work for you. Then you just instantiate it (using the .veo or .vho file) in your code. I'm sure there's a way to instantiate it into a schematic too.

    You need to give us a MUCH better description and possibly code/schematics before we can really help you beyond that.
  3. PCB_designer

    New Member

    Jul 28, 2011
    This is actually quite simple. In VHDL you can say:

    Code ( (Unknown Language)):
    1. ---------------------------------------------------------
    2. signal inputA, inputB, sum : std_logic_vector(23 downto 0);
    3. signal enable : std_logic;
    4. ---------------------------------------------------------
    5. process(enable,inputA,inputB)
    6.     if(enable='1')then
    7.         sum <= inputA + inputB;
    8.     end if;
    9. end process;
    10. ---------------------------------------------------------
    ISE should know exactly what to do with this to get you your desired result.