Hi,
I have an assignment as follows:
"Design a AC/DC switching power supply for a notebook computer. The specifications are listed as follows:
Input voltage 100Vrms 240Vrms, 50Hz
Output voltage 19.5Vdc
Switching frequency 80kHz
Output power 100W
Output voltage ripple ±0.5V
Input power factor >0.9 (at 100% load)
Input current harmonics Class A of IEC 61000-3-2 (at 100% load)
Transformer isolation No
You may consider a two-stage approach. That is a PFC circuit in DCM followed by a DC/DC regulator in CCM. But you need to add an input L-C filter to smooth out the large current ripple due to DCM operation.
In the assignment include the following subtasks:
1. Show the design procedure including the choices of converters, values of circuit parameters (inductors and capacitors), and component stresses on power semiconductors (average and peak values of voltage and current).
2. Calculate the power factors at full load for input voltage at 100Vrms and 240Vrms.
3. Plot the theoretical and simulated duty cycles against load conditions (10%, 50% and 100%) for the two converters under two input conditions, i.e., 100Vrms and 240Vrms.
4. Simulate the complete power-stage design using open-loop control on LTSpice. Do not use ideal semiconductors for simulation. Pick MOSFETs and diodes from the LTSpice library.
5. Capture the input current, inductor current of each converter, intermediate voltage and output voltage at full load for the two input voltages, namely, 100Vrms and 240Vrms.
I have attached what I have done so far. I seem to be stuck and cannot get the required output. Could anyone please advise me where I am going wrong.
Any Advise is greatly appreciated.
Thanks
I have an assignment as follows:
"Design a AC/DC switching power supply for a notebook computer. The specifications are listed as follows:
Input voltage 100Vrms 240Vrms, 50Hz
Output voltage 19.5Vdc
Switching frequency 80kHz
Output power 100W
Output voltage ripple ±0.5V
Input power factor >0.9 (at 100% load)
Input current harmonics Class A of IEC 61000-3-2 (at 100% load)
Transformer isolation No
You may consider a two-stage approach. That is a PFC circuit in DCM followed by a DC/DC regulator in CCM. But you need to add an input L-C filter to smooth out the large current ripple due to DCM operation.
In the assignment include the following subtasks:
1. Show the design procedure including the choices of converters, values of circuit parameters (inductors and capacitors), and component stresses on power semiconductors (average and peak values of voltage and current).
2. Calculate the power factors at full load for input voltage at 100Vrms and 240Vrms.
3. Plot the theoretical and simulated duty cycles against load conditions (10%, 50% and 100%) for the two converters under two input conditions, i.e., 100Vrms and 240Vrms.
4. Simulate the complete power-stage design using open-loop control on LTSpice. Do not use ideal semiconductors for simulation. Pick MOSFETs and diodes from the LTSpice library.
5. Capture the input current, inductor current of each converter, intermediate voltage and output voltage at full load for the two input voltages, namely, 100Vrms and 240Vrms.
I have attached what I have done so far. I seem to be stuck and cannot get the required output. Could anyone please advise me where I am going wrong.
Any Advise is greatly appreciated.
Thanks
