About 8 bit latch by 74373 chip...

Thread Starter

RRITESH KAKKAR

Joined Jun 29, 2010
2,829
Hello,

I am using 74373 to latch AD0 - AD7, but the problem is the enable pin that is pin 11, but when i change it to Vcc and gnd there is no change...,why??

and i am taking output from Qn...and input to Dn..
 

Thread Starter

RRITESH KAKKAR

Joined Jun 29, 2010
2,829
here is my 74373 schematic...
I am connecting OE to Gnd, the Enable pin is used by ALE(addr. latch enable) of 8085.
When, i connect it to gnd and vcc, the output remain the same.
why??
 

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eblc1388

Joined Nov 28, 2008
1,542
The ENABLE pin enable the latch.

When the ENABLE pin is HIGH, what happens on the D inputs will be seen on the Q outputs, so the latch is like a wire connecting D input to Q output.

When the ENABLE pin is LOW, the latch is enabled and the Q outputs retain the logic state prior to the ENABLE pin goes LOW. At this moment, changing the D inputs will cause no effect to the Q outputs.
 

SgtWookie

Joined Jul 17, 2007
22,210
Pin 1 (output enable) is active low.
When pin 1 is low, the output is enabled.
When pin 1 is low, raising pin 11 (latch enable) will cause the Qn output to follow the Dn input. With pin 11 low, Qn will remain in the state it was last when pin 11 was high, unless pin 1 goes high.
When pin 1 is high, the output is in a high impedance state, and the output won't change with inputs to the latch enable (pin 11) or data.
With pin 1 high, you should be able to use high-value pull-up resistors to Vcc or GND to change the default (high impedance) logic level if desired.
 
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t06afre

Joined May 11, 2009
5,934
I also think it would be more correct to use a 74xx374. Tie the pin 1 on the latch low. And then tie the ALE from the 8085 to the clock input (pin 11) on the 74xx374 via a inverter
 

Papabravo

Joined Feb 24, 2006
13,559
Because the bus (AD0-AD7) has both address information and data information on the D-inputs. The purpose of ALE(Address Latche Enable) is to capture the low order address information at the beginning of the cycle and hold it for any memory or I/O devices that want to decode this information.

After ALE goes low the D-inputs become the data and the Q outputs hold the address bits until the next cycle when ALE will go high again and capture a new address. It's all explained in the datasheet and hardware manual.
 

stahta01

Joined Jun 9, 2011
133
I disagree, no inverter is needed between ALE and 74373

Because the bus (AD0-AD7) has both address information and data information on the D-inputs. The purpose of ALE(Address Latche Enable) is to capture the low order address information at the beginning of the cycle and hold it for any memory or I/O devices that want to decode this information.

After ALE goes low the D-inputs become the data and the Q outputs hold the address bits until the next cycle when ALE will go high again and capture a new address. It's all explained in the datasheet and hardware manual.
Note: Everything in this quote is correct; but your conclusion is wrong.

Edit: I just found the cause of the confusion; an inverter is needed between ALE and 74374; but is not needed between ALE and 74373 chip.



The ALE is designed so that the Address (AD0-AD7) is supposed to be latched during the trailing/falling edge of the ALE pulse.

On the raising edge my reference books says the address is still settling; after the ALE going low the address (AD0-AD7) is still valid for almost half a clock cycle.

And, another site shows the same.
http://www.8085projects.info/IO-Interfacing-Methods.html

Tim S.
 
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stahta01

Joined Jun 9, 2011
133
Ok, how to choose the bypass capacitor value for quartz crystal of 4Mhz..??
My 1981 reference book shows no bypass caps; says just hookup an 1 to 6 Mhz crystal and the 8085 divides it by 2 to get its speed. So a 3 Mhz 8085 uses an 6 MHz crystal. Edit: It been decades since I read this book; I bought it brand new.

ISBN: 0-13-691089-0 Practical Hardware Details for 8080, 8085, Z80 and 6800 Microprocessor Systems by James Coffron


Google lets you get some results for "Microprocessor 8085 And Its Interfacing" By Mathur

Tim S.
 
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