74ls96 function error in proteus

dl324

Joined Mar 30, 2015
13,122
If Qa=0, Qb=0, Qc=1,Qd=0 and Qe=1, I will connect Qe to the input of Qd, output of Qd to input of Qc and so on, and Serial in to input of Qe. I will change the control lines to Clear=L and Preset Enable=H
What will happen to the 1's when you clear the register? What will you have after the preset?
 

Thread Starter

cl4y

Joined Mar 17, 2016
23
Yes. Cause even if I load again it will always clear the register, unless I change the control lines.
 

dl324

Joined Mar 30, 2015
13,122
Yes. Cause even if I load again it will always clear the register, unless I change the control lines.
You need to be able to maintain the data in the shift register through a reset operation. Do you have any ideas on how to do that?

When is your assignment due?
 

Thread Starter

cl4y

Joined Mar 17, 2016
23
You need to be able to maintain the data in the shift register through a reset operation. Do you have any ideas on how to do that?

When is your assignment due?
No sir, I can't think of a way to do that.

Next week sir.
 

Thread Starter

cl4y

Joined Mar 17, 2016
23
What kind of logic could you use to save the data in the shift register before it gets reset?
By having a H on the Clear and L on the preset enable. By this I can reset the register only by changing the Clear to a L
 

dl324

Joined Mar 30, 2015
13,122
By having a H on the Clear and L on the preset enable. By this I can reset the register only by changing the Clear to a L
We have established that clearing the register will result in any 1's being lost. What circuity can you add to save the data in the shift register before it is cleared?
 

Thread Starter

cl4y

Joined Mar 17, 2016
23
That's one way. Show how you would connect it and the associated timing to save the data and "load" into the shift register.
Qe to D, Qd to C, Qc to B, Qb to A and Si to E. But I'm not sure about the clock sir. Should I connect the clck of the register to the clock of the d ff's.
 

Thread Starter

cl4y

Joined Mar 17, 2016
23
Think about the operations and timing required to save and load data from the flip flops to the shift register.
This is what I thought of doing sir.
First, I'll invert the clk comijg from the register before connecting it to the clk of the ff's. So whenever I had a L on my register's clk i'll have my ff's to save data. Then if it's H my ff's output won't be affected by the changes in my register.
 

dl324

Joined Mar 30, 2015
13,122
I'll invert the clk comijg from the register before connecting it to the clk of the ff's. So whenever I had a L on my register's clk i'll have my ff's to save data. Then if it's H my ff's output won't be affected by the changes in my register.
Between clocks to the shift register, you need to clock the flip flops and clear/preset the shift register. How can you do that with the shift register clock?
 

Thread Starter

cl4y

Joined Mar 17, 2016
23
Were you able to come up with a circuit in time?
Yes, but he said that adding a circuit is not allowed, and the shiftleft function is built-in just like how the 74ls193 cab count up and down the 74ls96 can also shift right and left.
 

dl324

Joined Mar 30, 2015
13,122
Yes, but he said that adding a circuit is not allowed, and the shiftleft function is built-in just like how the 74ls193 cab count up and down the 74ls96 can also shift right and left.
I don't see how the LS96 can left shift without additional circuitry because it can't "load" a zero.

Could you post your solution and the instructor's for future reference?

Did you change your member name? If so, how did you do it?
 

Thread Starter

cl4y

Joined Mar 17, 2016
23
I still don't know the answer.

I used my email account to register, so I asked the admins if I can have a username and they approved it.
 
Top