Hi everyone! I intend to delay a 1Vpp mostly sinusoidal signal in the 100Hz range for 5µs.
My first inuition was a 1000m wire, but I decided to go with cascaded LC-filters first, as in this.

\( t_{d}=\sqrt{L*C} \)=0,07µs per stage with 100nH/50nF, so I straightforwardly LTspice-simulated a couple (60-80: ) LC-filters and found the result as expected.

The prototype however shows no measureable delay @100Hz.

What am I missing here?!

• can I expect an actual delay, or will a bunch of LC-Filters only generate an equivalent phaseshift?
• the phaseshift of my filter above should be zero, as 100Hz << fg=2.25MHz?
• I totaly ignored impedance issues. i.e., the input is a generator@50Ohm, the output is high-impedance, the whole network is low-impedance. Is this a problem?

for context: This network's output goes to a voltage-to-current converter. As Input-Driver I thought of an LTC6373 PGIA.

What are your thoughts of my contraption here? Any help is greatly appreciated!..

 

First of all, phase shift *is* delay. If a 100 Hz sine wave zero crossing is delayed for 2.5 ms, with no other waveform distortions, that is a phase shift of 90 degrees.

Second, 60 stages of 0.07 us per stage is only 4.2 us of delay. If you are looking at a 100 Hz signal on a scope, that is below visual resolution.

I would use an opamp circuit called an all-pass filter.

https://wiki.analog.com/university/courses/electronics/text/chapter-4

http://www.ecircuitcenter.com/Circuits/op_allpass1/op_allpass1.htm

https://www.allaboutcircuits.com/technical-articles/focusing-on-phase-the-all-pass-filter/

ak

 

thank you AnalogKid for the swift response! As I understand it, phaseshift and delay can be equivalent, but to be pricise, I need a frequency-independent true delay.

This is a tricky topic, as many articles (e.g.) explain the similarities and differences, and I obviously havent fully grasped it. In essence I question if I can expect a frequency-invariant td=sqrt(LC) from my circuit?

• I can immagine a transmission line of defined length (e.g.) causes the req'd delay as propagation delay.
  I can also believe the equivalent model of lumped LCs serves the same in all aspects.
• I also stumbled across the opamp-allpass-circuit you pointed out above.
  Seen as filter, the phaseshift is obvious, I just don't see where a delay should arise.
• I also found that my pile of LCs could be arranged in an allpass- instead of lowpass-configuration.
  But would that change anything in my case f<<fg ?

It's true, to measure the desired effect is tricky. It's 0,05% of the signals periode. Luckily I've got a decent DSO.
But I also doubt this at this point - am I measuring crap and should see a true delay @100Hz?

On the xact number of stages req'd; In my application it's necessary to calibrate the delay in small increments, so having 80 stages gives me enough room to maneuver - theoretically.

 

With a fast microcontroller perhaps you could A/D convert the input signal then spit it out ~5uS later to a D/A converter?

 

I need a frequency-independent true delay.

An important detail to omit. Over what frequency range? AND - what delay tolerance across that bandwidth?

And, again, in the context of this thread, phase shift is delay. It may not be frequency-independent, but it is delay none the less.

https://en.wikipedia.org/wiki/Group_delay_and_phase_delay

ak

 

What is the purpose of such a slight delay for a 100Hz signal?
What is going to detect that difference at the output?

 

I am soo tempted to do xactly that ADC/µC/DAC thing.
But I refrain from it until I can rule out this cheap analog solution.

 

Let me add some more background to this story. We're measuing Power. And the Voltage-path experiences a (digital) delay in the order of 5µs. Thus I delay the current-path likewise, in order to get a precise powermeter-reading.

The actual Powermeter is a Yokogawa WT333E, the Voltage Amplifier/Divider is a Rohrer Arcus T303B.

The "bandwidth" is only 50Hz ... 200Hz.
yet the precision of the powermeter reading must meet reference standards sub 0,5%.

 

So you are introducing a phase shift of 1.57m rad.
The error in the power will be 1-cosφ, and cos(1.57 mrad) is 0.9999987. The error in the sampled signal will be unmeasurable unless you have a 20bit A/D, and to achieve that you need a SNR of 117dB in the rest of the measurement circuit.

 

An important detail to omit. Over what frequency range? AND - what delay tolerance across that bandwidth?

And, again, in the context of this thread, phase shift is delay. It may not be frequency-independent, but it is delay none the less.

50Hz ... 200Hz << fg=2MHz
the tolerance of the voltage-path-delay is small, it's digital, so consider it constant, 5µs i.e.
if I translate this from delay to the phase-world, we're looking for a phase-linear allpass-filter, right?!

 

So you are introducing a phase shift of 1.57m rad.
The error in the power will be 1-cosφ, and cos(1.57 mrad) is 0.9999987. The error in the sampled signal will be unmeasurable unless you have a 20bit A/D, and to achieve that you need a SNR of 117dB in the rest of the measurement circuit.

thank you much for pointing this out so fast. the maths of the expected error doesnt match the perceived error by (at least) two orders . This was and still is my initial splinter of doubt to the bigger picture.

however; in this thread I want to focus on the task of a 5µs delay line in the 100Hz range.

 

Thus I delay the current-path likewise, in order to get a precise powermeter-reading.

As Ian0 noted, compensating for that small delay results in a basically unmeasurable error, so you are spending time and effort for no improvement in your results.
That's poor engineering.

 

As Ian0 noted, compensating for that small delay results in a basically unmeasurable error, so you are spending time and effort for no improvement in your results.
That's poor engineering.

There are quite a few companies and engineers working on this issue right now, and some of them act poorer than others regardless; a phase-error in power-measurment is a systematic error that can be corrected., which is my task here.

 

There are quite a few companies and engineers working on this issue right now, and some of them act poorer than others regardless; a phase-error in power-measurment is a systematic error that can be corrected., which is my task here.

Then you are working for a poorly run company.
But the either a low-pass or all-pass filter will do what you want, since the phase-shift/delay you want is so small.

 

What’s your SNR?

 

the precision of the powermeter reading must meet reference standards sub 0,5%.

The period of a 50 Hz waveform is 20 ms. 0.5% of that is 100 us. That is 20 times greater than the 5 us delay you are trying to achieve. I know that this does not translate directly into the processed reading accuracy, but it looks like you are chasing false precision.

Another way to look at it: at 50 Hz, 5 us is 0.09 degrees of phase error. For this to matter, every single downstream component / subsystem in the instrument must be at least 10x better than this for this to have a direct effect on the last digit of a reading.

Or something like that.

ak

 

If you must pursue this sisyphean task then who am I to stop you, but how are you going to prove that you have achieved it?