555 timer

Discussion in 'Homework Help' started by swiftydonuts, Feb 6, 2009.

  1. swiftydonuts

    Thread Starter New Member

    Feb 6, 2009

    Hi all, I'm a little confused with this circuit. I got this 555 timer PWM circuit from http://www.dprg.org/tutorials/2005-11a/index.html.

    This webby claims that the output(pin 3) and discharge pin(pin 7) will both enter high and low state at the same time.
    Below is what it's written on the webby:
    [In this circuit, the output pin is used to charge and discharge C1, rather than the discharge pin. This is done because the output pin has a "totem pole" configuration. It can source and sink current, while the discharge pin only sinks current. Note that the output and discharge pins go HIGH and LOW at the same time in the oscillator cycle.]

    However, inside the 555 timer:
    the FF inside the 555 is connected to the output stage and the NPN transistor. My understanding is, when the condition causes the FF to output a logic 1, pin 3 goes high while pin 7 is shorted to ground because the transistor is turned on. When the condition caused the FF to output a logic 0, pin 3 becomes a current sink meaning logic 0 while pin 7 goes high because pin 7 is connected to +V. Meaning to say that the discharge pin and output pin will always be in opposite logic.

    Is my understanding wrong? Please do correct me if it is so. Thanks a lot in advance!!
  2. hgmjr

    Retired Moderator

    Jan 28, 2005
    Take a look at the datasheet for the LMC555 for example and you will see that the signals from pin 7 and pin 3 are in phase.

  3. Wendy


    Mar 24, 2008
  4. mik3

    Senior Member

    Feb 4, 2008
    The description of the circuit is fine, the output and discharge pin go high and low simultaneously. The actual circuit inside the 555 is not the same as the one you saw. The circuit you saw just shows the operation of the 555. If the output of the FF goes high when the input of the FF is low then everything is fine. Think of it.
  5. swiftydonuts

    Thread Starter New Member

    Feb 6, 2009
    Dear all,

    Thank you for your kind replies. I viewed some other webbies and they mentioned that pin 7 is infact in sync with pin 3. If pin 3 goes LOW, pin 7 is shorted to ground and vice versa.

    I viewed the inside connection from a datasheet. The 'output stage' is actually an inverter. That means if FF outputs a HIGH, pin 3 will be low and pin 7 is shorted to ground too, haha!

    Thanks all!!