555 timer reset

Discussion in 'General Electronics Chat' started by pfeldman, Mar 11, 2013.

  1. pfeldman

    Thread Starter New Member

    Mar 11, 2013
    I'm looking at a block diagram of the 555 timer. It shows the outputs of the two comparators going to a block labeled "Control F/F". I assume that F/F stands for "flip flop", but don't understand how the reset is interacting with this block. I'll be grateful if someone can explain this.

    Phillip M. Feldman
    Dos Pueblos High School Science Club mentor
  2. t_n_k

    AAC Fanatic!

    Mar 6, 2009
    The reset pin is normally tied to +Vcc to ensure normal operation of the 555's configured functional mode [e.g. mono-stable / astable].

    A high-to-low voltage transition [+Vcc to ground/common say] causes a high level state at the 555's output to be driven to the low level state. This is done by setting the flip-flop state accordingly at the high-to-low transition on the reset pin. If the 555's output is already at low level state a change at the reset pin will have no effect.