# 5421 BCD serial to parallel complementer

#### Karamelg1

Joined Mar 25, 2007
12
Hi

I am having trouble starting the design to this circuit. I have the 5421 code "table"

5 4 2 1
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 1 0 0 0
6 1 0 0 1
7 1 0 1 0
8 1 0 1 1
9 1 1 0 0

Now I am supposed to make a Mealy or Moore diagram, but I am not really sure what the purpose is. What exactly does a serial to parallel complementer do? Any help would be appreciated. Thanks!

#### Papabravo

Joined Feb 24, 2006
21,302
It takes four bits of serial data and outputs the complement as four bits in parallel. There are two complements I can think of, one would be called the 9's complement and would consist of pairs that add up to 9. The other would be the 10's complement with pairs that add up to 10. Which would you prefer?

#### Karamelg1

Joined Mar 25, 2007
12
Well I think 9's complement would be what I am looking for.

#### Papabravo

Joined Feb 24, 2006
21,302
So you need a shift register of four bits, some combinatorial logic to do the 9's complement, an error bit, and a two-bit state machine.
State 0 - 4 bits in shift register, output 9's complement, output error bit, goto 1
State 1 - 1st bit in shift register, waiting for 2nd bit, goto 2
State 2 - 2 bits in shift register, waiting for third, goto 3
State 3 - 3 bits in shift register, waiting for forth, goto 0

That's one way to do it - not necessarily the optimal or the best way. What's your solution?

#### Karamelg1

Joined Mar 25, 2007
12
Thanks,

We ended up going over this in class and my professor came up with a state diagram with 12 states, and I realize the hardest part of this is for me to come up with a Mealy or Moore state diagram for a circuit. If you have any advice on how to approach problems and solve with Mealy or Moore that would be great. Thanks!

#### Papabravo

Joined Feb 24, 2006
21,302
Twelve states seems a bit excessive unless I'm missing something. The difference between the two formulations is a determination of the outputs as a function of the state alone, or as a function of the transition from one state to the next.

AFAIK there is no general procedure for synthesizing a state machine from a specification. Over time you kind of get a feel for it. Once you have a state machine in either the Moore or the Mealy form there are a variety of techniques that can be applied to identify simplifications and optimizations. Generally speaking if I can get one to work I don't mess with it.

BTW - do you think your university would consider firing your professor and hiring me in his place?

ROFL