40192 Up/Down Counter

Thread Starter

sni9er

Joined Oct 21, 2011
15
Good afternoon guys

i'm lookinf sor anyone who has insight using the CD40192 Up/Down Counter

im running into some issues cleanly switching my CU & CD inputs so i can count up and down, the below truth table should hopfully clarify this, currently when i switch the CU/CD and the VDD (using DPDT switch) the clock is triggering and causing cruddy counts, i know the issue is bounce but im not entirly sure my method of using 2 inverters as a schmidt trigger will work

thoughts ?



Action| Count Up| Count Down
Count Up| _/--|1
Count Down|1|_/--


vbulitin [ - table -]'s do my f'in head in .. so blaady awkward

anyway you'll have to check out the datasheet haha

http://pdf1.alldatasheet.com/datasheet-pdf/view/80450/NSC/CD40192.html
 

MrChips

Joined Oct 2, 2009
30,706
You have to show your schematic.
Make sure that both Count Up and Count Down are HIGH before switching UP/DOWN.
And yes, if you are using a switch or push-button to generate a clock you must debounce the switch.
 

Thread Starter

sni9er

Joined Oct 21, 2011
15
See Attached:)

CD/CU Input Current Circuit:



Suggested CU/CD circuit, however im not confident this is the best way ?:

 

MrChips

Joined Oct 2, 2009
30,706
1. Remove the two Schmitt Triggers on the inputs of CD and CU.
2. Add 100K pullups on CD and CU inputs.
3. Add 100K pullups on Schmitt Trigger input.
4. Show the complete schematic of your Schmitt Trigger circuit.
 

Thread Starter

sni9er

Joined Oct 21, 2011
15
Thanks MrChips

i'll add up a full diagram of my Schmidt Trigger today or tomorrow,

the second image was my proposed idea which you have no confirmed wouldnt be a good idea

i shall return !
 

SgtWookie

Joined Jul 17, 2007
22,230
Hang on a second ... the only 4000 series Schmitt triggers that I'm currently aware of are:
  1. 40106 - hex Schmitt trigger inverters
  2. 4093 - quad Schmitt trigger NAND
And that's it!

Both of these have inverting outputs; but that was not shown on the diagram.
So, the input of the lone Schmitt-trigger inverter needs to be pulled to ground with a 100k resistor and have a 100nF/0.1uF cap in parallel with it, and the left side of the switch needs to be connected to Vdd instead of ground via a 10k resistor.

The cap will help to prevent bounce. The 10k resistor limits the current through the switch to 1mA if Vdd=10v.

Rst must be held low, and PE must be held high.
 

crutschow

Joined Mar 14, 2008
34,280
Your schematic is incorrect. It shows the CU and CD both connected at the same time. It needs to be one or the other.
 

Thread Starter

sni9er

Joined Oct 21, 2011
15
OK I have to apologies for the Rushed Diagram, I thought I had shown clearly, but after a nights sleep looking at it again it actually looks like crap ha-ha anyway I have made some modifications to the schematic, with SGT's suggestions and the DPDT switch in its current state (which I believe without de-bouncing is causing the error)


 

Thread Starter

sni9er

Joined Oct 21, 2011
15
I would also like to add, my current incarnation of the circuit counts up and down with no bounce, it is mearly the up/down swithcing that i am having trouble resolving, just incase i didnt make that clear :)

thank you for your support on this !
 

MrChips

Joined Oct 2, 2009
30,706
And I might add, don't be so sure of yourself. It is both your switch and your Schmitt-trigger that are not properly wired.

What's wrong with your circuit?

1. The input of the inverter has no DC path to ground. It will be floating.
2. The RC filter is configured incorrectly.
3. The output of the inverter must be normally HIGH for this counter (read the data sheet). As it is, it can be anything with a floating input.
4. Your CD and CU inputs are floating. Anything can happen when you switch UP/DOWN.

Below is my suggestion to fix all of the above:




The inverter can be either plain inverter or Schmitt-trigger inverter.

(When you ask for help, it helps to be humble.)
 
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Thread Starter

sni9er

Joined Oct 21, 2011
15
I’m extremely sorry if I came across as anything other than grateful, I can assure you I am every bit grateful for your comments and advice!



my assumptions on the functioning of the circuit, were only made based on my development (first implementing a debounced count with a 555 as a schmidt then later the Hex inverter) so when i was receving bounce when i was switching the Up/Down i assumed it had to be that addition, however once again im sorry if it came across as being arrogant or ungrateful



thanks once again, i shall attempt the suggested fixes
 

Thread Starter

sni9er

Joined Oct 21, 2011
15
perhaps you could clarify Point 4 for me ?

im not entirly sure what the function of the 2 100k pull-ups, and how would this be affected when switching with the DPDT (on CU/CD)

I have crudely annotated your suggestion, am I following the logic levels correctly ?


many years of practice to go haha !
 

Wendy

Joined Mar 24, 2008
23,415
The worst thing you can to do a CMOS input is to leave it floating. The above configuration simply never does that.
 

MrChips

Joined Oct 2, 2009
30,706
All logic inputs, especially on CMOS gates, must be connected to something (a logic LO or HIGH hopefully). CMOS gates especially have very high input impedances. Hence they will act like radio antennas and will bounce around like crazy.

When you switch your selector switch, there is a moment when the inputs are not connected to anything, i.e. they are floating.

R3 and R4 pull-up resistors ensure that the CU/CD inputs are always HIGH even when the switch is in transition. The values of the resistors are high enough that they present a 50uA load to the inverter output which the inverter can easily sink.

Another important requirement is that both CD and CU must be HIGH when making your switch over. For this reason the output of the inverter must be normally HIGH, a LOW pulse to count.
 

SgtWookie

Joined Jul 17, 2007
22,230
Just to clarify; the counter increments or decrements when the up or down input transitions from 0 to 1.

So, when you push button S1, the UP or DOWN input will go to a logic 0, and when you release the button, the input will rise to a logic 1 which will then increment/decrement the counter - depending on the setting of S2.
 

MrChips

Joined Oct 2, 2009
30,706
I might also add that the above Schmitt-trigger push button debouncer is not always perfect.



The circuit above is more reliable because it is an S/R latch. The output of the latch will change state as soon as the PB is pressed and will not revert back until the opposite contact is bridged. Normally one would see this feedback circuit using a pair of NAND gates. Inverters as shown will also work in this application.

I have added the NAND circuit below so that it is clear what I am referring to:



If you are using TTL gates, make sure you change the resistors to 1K ohms. You can safely use 1K resistors with CMOS or TTL.

Of course, the one drawback with this circuit is that it requires a double-throw push-button.
 
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SgtWookie

Joined Jul 17, 2007
22,230
MrChips,
There is a problem with your S/R latch. When the switch first hits one position or the other, the output of one of the inverters is shorted to ground. Arguably, the situation exists only momentarily. However, the momentary high current through the switch will tend to age it quite rapidly.

To alleviate this situation, 10k resistors should be added in series with the wires going from the outputs of one inverter to the input of the other inverter.

Using NAND or NOR gates eliminates the need for those resistors.
 
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