3 bit up/down counter using positive edge triggering clock pulses with T-flip flop

Thread Starter

avan93

Joined Oct 29, 2013
5
My assignment is design a 3 bit up/down counter using positive edge triggering clock pulses with T-flip flop.Is this correct??

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tshuck

Joined Oct 18, 2012
3,534
My assignment is design a 3 bit up/down counter using positive edge triggering clock pulses with T-flip flop.Is this correct??

View attachment 65422
Have you tried simulating it?

The great thing about getting results in engineering is being able to rationalize your answer. In this case, run through the logic and verify it does what a 3-bit, positive edge-triggered counter does.
 

WBahn

Joined Mar 31, 2012
26,398
With two input signals you have four possible control states. While what it should do in two (and arguably three) of them is fairly obvious, what it should do in the fourth is not. So before anyone, yourself included, can tell if the design is correct you have to first clearly specify what the design is supposed to do.
 

WBahn

Joined Mar 31, 2012
26,398
Is it right or wring
Walk through it and figure it out. It should only take a few minutes to build up the transition tables to verify whether it works correctly or not. If you run into problems, post what you've done so far and we can help you figure out how to move forward.
 
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