3 bit by 3 bit two's complement multiplier

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Joined Dec 1, 2009
I'm trying to gather other ideas to build and implement a logic circuit for a 3 bit by 3 bit two's complement multiplier. Originally we considered doing case by case for each multiple, but that end resulted having to use over 16 ICs. I've been trying to read and understand how to implement full adders and a shift register to lessen the IC count. Could someone offer me some advice? Available are AND/OR/Inverter/NOR/NAND/XOR/a multiplexer/jk flip flop
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