I need to design a 2 level circuit that implements a 4 bit majority function.
I'm not really sure what the question is asking for. I know that for a 4 bit majority funciton its output will be 1 if three or more of the inputs are asserted. When they say 2 level do they just mean 2 levels of gates, like a bunch of ands connected to a single or.
Here is a pick from the book, is this a 3 bit majority function?
http://www.johnloomis.org/ece314/notes/carch/img244.gif
I'm not really sure what the question is asking for. I know that for a 4 bit majority funciton its output will be 1 if three or more of the inputs are asserted. When they say 2 level do they just mean 2 levels of gates, like a bunch of ands connected to a single or.
Here is a pick from the book, is this a 3 bit majority function?
http://www.johnloomis.org/ece314/notes/carch/img244.gif