Hello
Im working on a multilevel inverter PUC type , i will be using PWM to generate the states of my switches , my question is how to go from those state signals to get the switches pulses in order to control them ?

 

Analog multiplexer.

One question: Do you need to allow for "dead-time" between states or does the switching between states need to be smooth and continuous?

 

can you show your power stage schematic and show which switch is S1 etc?

 

can you show your power stage schematic and show which switch is S1 etc?

Here are the schematic ,the algorithm proposed and the state table i am stuck with the block "pulse generation based on table"

 

That really depends how your circuit represents the 8 states. It could be a binary number, so state 3 is 011 and state 4 is 100, or it could be 1 out of 8 so state 3 is 0010000 and state 4 is 0001000. But the difference is only in how you wire up logic gates and which you want to choose, and that only matters when you realize those gates in discrete chips and not in some programmable logic IC such as CPLD or FPGA.

As a side note, the first picture Figure 3.5* does not show states 3 and 7, but the table does. Where did the switch states in the table come from, if the diagram does not show them?

No offense, but what you ask and how you ask is making this conversation really confusing.
Can you please say as much as you can so we can understand your goals and needs? Can you post here the whole paper where these pages come from?
To me this now seems like some theoretical excercise or assignement in electronic engineering school, however if your ultimate goal is to finish with an actual working PUC inverter circuit and pcb, then please say so. Try to describe where this project comes from, your wants and needs and expectations as best as you can, this will really help me and others understand you and provide helpful answers and hints.