Trying to understand this circuit. Halfway and TS decided to test on SPice

Not working. What's his mistake?

Someone assist

Thanks

 

hi Z,
Why are you using a dual +/-15V supply.?
Post the FET model.
E

 

hi Z,
Check the value for R2 you have minus 10k! ie: -10k.

E

 

hi Z,
Check this out , I am using a 2N2819 jFET
E

 

hi Z,
Check this out , I am using a 2N2819 jFET
E
View attachment 211958

Thanks thanks

Please share the .asc

Mine keeps "stepping source" dunno why

Already changed the -10k

Really wish to figure circuit myself but....

D1 and D2 is just for input protection?

At some point does current flow from through the JFET from the virtual ground? from Source to drain??

Thanks

 

hi Z,
Copy of my asc file.

E

 

I am using a 2N2819 jFET

3819? (which btw now seems obsolete). I think the reason for the +-15V supplies is because the original article used 741's as the opamps.

 

3819? (which btw now seems obsolete).

hi A,
Not my stock.

I asked the TS for his FET model, still waiting.
E
Just seen my typo 2819, I don't have of those...

 

hi A,
Not my stock.

I asked the TS for his FET model, still waiting.
E
Just seen my typo 2819, I don't have of those...

Model?
The circuit not even working on my spice. it keeps "stepping source"

 

hi Z,
Which jFET type are you using in your simulation.?
E

BTW: I use Windows 10

 

hi Z,
Which jFET type are you using in your simulation.?
E

BTW: I use Windows 10

Was using 2n5458

Btw, please who is Windows 10?

 

Windows 10.

https://www.google.com/search?clien...hUKEwithOWFhcjqAhXVoFwKHVFADhsQ4dUDCAs&uact=5

 

Hello,

Windows 10 is the operating system of the computer.
I use linux with WINE to run LTSpice.

Bertus

 

hi Z,
There should be a FET model in your LTS Folder for a 2N3819, use that and retry the sim.
There maybe a problem with original FET 2N5458 model.

E

 

hi Z,
There should be a FET model in your LTS Folder for a 2N3819, use that and retry the sim.
There maybe a problem with original FET 2N5458 model.

E

Same stepping source problem

Will Download WINE to run windows 10

Thank E

Btw, kindly throw some light on the circuit

The output of 1st op amp is -vi.
This voltage is divided between r8 and r9

Now can current from the virtual ground (source) to the drain of the JFET when it's gate is 0v?

Please what is he missing?

 

hi,
Here is a collection of waveforms that should help you see the operation.
E

 

What?

Why is V(vdfet) like that?

 

hi,
Its because the Gate is being driven by O2 via the diode, so the Drain will be same signal form.
E

 

hi,
Its because the Gate is being driven by O2 via the diode, so the Drain will be same signal form.
E

Please remove R9 (make it infinite not 0)
does it work? if yes, kindly send me the image of voltages

Thanks thanks

 

hi Z,
Tried that, removed R9.
LTSpice cannot solve the equations so goes into a continuous loop.

So no waveforms are created.

Why do you want to remove R9.?
E