Interesting pull down charecteristics

Thread Starter

MikeJacobs

Joined Dec 7, 2019
226
I lack the total understanding of the logic gate construction other then one being built internally with BJT and the other being built with with fets (CMOS)

Riddle me this, on a CMOS part say an AND gate i was just farting around with, i did the following.

Both inputs of the AND gate are just tied to ground on a bread board. I put a pull down on both of them of 100k

The initial state of the circuit is just false on both gates.
I tie them both to the bread board 5V and surprise, the gate outputs a true.
However, returning them both to ground does not shut it off or turn it false.

Upon further inspection, with the 100k pulldown, there is a mysterious 2V sitting at both gates. As if the inputs are actually sourcing 2V somehow.

Just for kicks, i tried a much smaller pulldown of 10k instead of 100k and it works as expected. This experiment has me paying more attention to pull down choices but i thought on a CMOS part it was not a concern like TTL

Can someone explain to me why this just happened? Thanks
 

AlbertHall

Joined Jun 4, 2014
12,347
Is this 4000 series or the later versions 74HC or 74HCT?
Actually all of those have a maximum expected input leakage of 1uA so with a 100k pulldown the voltage should be less than 0.1V (0.2V if using one resistor for both inputs).
If this was on a solderless breadboard maybe the 100k was not actually connected.
 

Thread Starter

MikeJacobs

Joined Dec 7, 2019
226
Thanks for the ideas.
Yes it was just a solder-less breadboard. I tried the 100k pull down in multiple spots on the breadboard with the same result.

This was a 74AHCT series part
 

Thread Starter

MikeJacobs

Joined Dec 7, 2019
226
and actually, it just started exhibiting the same behavior now with the 10k pull down and also a 2.7k pulldown.
It seems to be the only way to get it to shut off is to ground it right to ground ?
What am i doing wrong here?
 

AlbertHall

Joined Jun 4, 2014
12,347
This was a 74AHCT series part
That's a maximum 2uA leakage so the voltage should still be nowhere near 2V.
Try this again and if you still get the same result, measure the voltage on the actual resistor leads. If the chip pin is at 2V and the resistor is connected you should see 2V on one lead and 0V on the other.
 

Thread Starter

MikeJacobs

Joined Dec 7, 2019
226
Thanks for all the thoughts. So i am a bit confused.
I think i found the issue but not sure why i did what i did and or why it gave those results.

So.... for some reason, i put a (1k) pull down at the output of the gate.
I have no idea why.
When i removed that 1k at the output of the gate, it started to behave as expected.

The only thing i can think of is, with a 1k (which is hardly a pull down) you are asking the gate to source 5/1000 amps

or 5 mA
Now this thing has an 8mA drive so it should of done it just fine.

Which brings me to the never-ending next question.
Why did i just see what i saw?
 

MrChips

Joined Oct 2, 2009
30,821
Tell us the actual part number of the device.
Show us a photograph of your circuit on the breadboard.
Sometimes it is amazing what we find in a photograph.
 

OBW0549

Joined Mar 2, 2015
3,566
What am i doing wrong here?
Possibilities:

1. Bad contacts in breadboard (it's been known to happen)
2. Mis-wiring (i.e., the circuit you actually have isn't what you thought you have)
3. Working from wrong device pinout (check the data sheet. Then check it again.)
4. Power isn't connected properly to the IC

One way or another, the behavior you're observing is pathological and can only be caused by some kind of screwup.

And like others have said, POST A PICTURE OF YOUR BREADBOARD ARRANGEMENT.
 

MisterBill2

Joined Jan 23, 2018
18,576
What you will find with CMOS logic is that the inputs must all be defined, and either pulled high or low, and if not a direct connection then a resistor about 10K ohms. Otherwise the device can drift into a linear region where the performance is unknown and undefined.
 
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