I will be working on a 16-bit Adder for school project and I have two questions regarding it:

1) Comparing a 16-bit Carry Ripple Adder using static CMOS compound gates with that of a 16-bit Carry Look Ahead Adder, is the speed increase in the CLA significantly greater or not by much?

2) Regarding the CLA, if use Pseudo-Nmos logic, I know that Pseudo Nmos logic is faster, but will it consume more power than a CLA designed with static CMOS logic? If so, is the increase in power consumption very high??

Thanks