Hello, I have designed a two stage op amp with a phase margin of 63° ( with a compensation capacitance) which is sufficient to ensure good stability of the circuit. However, I still have a huge overshoot problem when I use it as a follower. How is it possible if my circuit is stable and how can...
I found this circuit here on the web. The post claims of improving the open-loop gain of the op-amp by huge margins, which is true. But if we try to analyse this circuit in MATLAB, we find that this has zero phase margin at cross-over, which gives gain peaking. My question is, can we use this...
Specifically, I am curious why the control loop must be broken such that one side of the break is high impedance while the other side is low impedance and if this applies to more than just power electronics. I've read several app notes including TIs AN-1889 (Step 1: Setting up the Circuit...
Hi There!
I am, for several reasons about building a adjustable LDO. Some of the specifications are:
- min input voltage 4.4V
- max output voltage 3.6V
- 500mV dropout, due to sense resistor
- wide current output range
- at least 20kHz bandwidth @ 10uA load, ideally 100kHz
Pass element shall...
Hello,
I'm trying to use an LM675 power op-amp IC as an output buffer for a signal generator. For stability, I've configured this IC as a non-inverting amplifier with a gain of 11 as per the circuit diagram below. As also recommended in the datasheet, I routed separate ground returns for the...
Hello everyone, I try to do my university project, which I have to create a simulation of series compensating stabilizer in MULTISIM NI with following parameters: output voltage should be 6.3V and max output current 1.8A. I've already created a circut, calculated the dependency between diode...