1. pranay1803

    Not Getting Desired output for 2:1 Mux (using MOSFET) in LTSpice

    I was trying to design a 2x1 MUX using a CMOS logic. I have used a 180nm library for the mosfets and made the circuits using Transmission gates. For simulation purposes, I have considered Width of PMOS as 3 times the width of NMOS. When S = 0 then the output should be D0 and when S = 1 the...
  2. Z

    2:1 MUX in LTSpice using CMOS Transmission Gates, implementation

    Hello. I am trying to create, for a project, a 2:1 Multiplexer using CMOS Transmission gates. This MUX requires 2 transmission gates, so 4 total transistors. I have seen some implementations use an inverter when connecting the Select bus. I am pretty bad at electronics. Take a look at my...