PWM frequency divider

Greetings.

Is there any way to divide the frequency of a PWM signal and simultaneously also the duty cycle with flips flops and logic gates?

Thanks.

Fabián

Hello,

When you put a PWM signal into a divider, you will end up with a signal of half the frequency and 50 % duty cycle.

A possibilty is to take an AND port take the input signal and the divided signal.
You will get a signal with half the frequency and half teh duty cycle.

Greetings,
Bertus

Is it correct?

As bertus said, it will give you half the original duty cycle. That's not what you asked for.

Hello. Thanks for responding. I do not want half, I want double the time in duty cycle

I have this circuit. In IN when the duty cycle is 10% in OUT duty cycle is 95%. When IN the duty cycle is 90%, the duty cycle at OUT is 55%. Responds to the equation 1-t / 2 (where t is the duty cycle in IN in%)

I need to divide the PWM signal several times (I need to measure the duty cycle of a high frequency signal), but using this circuit the duty cycle changes according to:

Period __________Duty cycle (%)
T ______________ t
2T _____________ 1-t / 2
4T _____________ 1/2-t/4
8T _____________ 3/4-t/8
etc
Ultimately, the duty cycle variation is so slim that you can not measure.

Thanks

It seems to me that one solution would involve converting the PWM signal to its equivalent DC level using an RC filter. You would also need to divide the squarewave by whatever factor you are looking for. You would then need to use the lower frequency squarewave to generate a new ramp the repetition rate of which would be the same as the new lower frequency squarewave. You would then use the recovered DC and the new ramp as inputs to a comparator. The new PWM would be the same as the old PWM only at the slower rate.

hgmjr

It seems a solution. But it doesn't work in a SPWM signal.

buscar

DominusDRR said:

It seems a solution. But it doesn't work in a SPWM signal.

Click to expand...

So do I take this to mean that you are dealing with a Sinusoidal PWM signal rather than a conventional PWM signal?

hgmjr

Can you describe in detail what you are trying to do, and why?

DominusDRR,

Are you asking the question if a given PWM frequency can be reduced to(1/2, 1/3, 1/4...) by logic gates while keeping the same duty cycle?

Interesting question albeit I don't know the answer.

Yes. It's a sinusoidal signal that is compared with a triangular wave.
The sinusoidal signal is 1 MHz and 100 MHz triangular

I'm building a kind of AD converter. I don't want to use a 100MSPS ADC for the following reasons:

1. The ADC is very expensive.
2. I use a 40 MIPS microcontroller, so it is very difficult for my microcontroller reaches 100 MSPS ADC.

I don't understand how your 100MHz PWM relates to an ADC. Please provide a block diagram of what you are trying to do.

The variation of duty cycle is proportional to the analog signal. When the duty cycle is zero, implies that the analog signal voltage is zero. When the duty cycle is equal to 100%, the analog signal is at its maximum level. The amplitude of both signals is the same.

I get different and proportional duty cycles per 10 ns (100MHz).

:S

DominusDRR said:

The variation of duty cycle is proportional to the analog signal. When the duty cycle is zero, implies that the analog signal voltage is zero. When the duty cycle is equal to 100%, the analog signal is at its maximum level. The amplitude of both signals is the same. :S

Click to expand...

How about a block diagram of the hardware you propose to use?

It's not complicated I want to do. Simply divide the SPWM signal for example up to 32 times, (3.125 MHz). Assuming the duty cicle somehow remains in proportion to the original, I would use the module comparison of my microcontroller to measure the duty cycle time. This time is proportional to the amplitude of my 100 MHz analog signal.

DominusDRR said:

It's not complicated I want to do. Simply divide the SPWM signal for example up to 32 times, (3.125 MHz). Assuming the duty cicle somehow remains in proportion to the original, I would use the module comparison of my microcontroller to measure the duty cycle time. This time is proportional to the amplitude of my 100 MHz analog signal.

Click to expand...

If you are modulating the duty cycle at 1MHz, how can you get useful information about that modulation if you divide the PWM frequency by 32?

Ron H said:

If you are modulating the duty cycle at 1MHz, how can you get useful information about that modulation if you divide the PWM frequency by 32?

Click to expand...

For example assuming that the duty cycle at some point is 10%, this implies that it's 1 ns, by dividing the frequency of some special arrangement of logic gates will be the new frequency of 3,125 MHz or a period of 320 ns. If the duty cycle is kept in proportion, also will be 10%, meaning that it's 32 ns. This time can be measured by my microcontroller.

Ok I'll ask, what is this for? Are you trying to measure the speed of light?