FPGAs (Field Programmable Gate Array)

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Forum for designing, programming and reconfiguring simple and complex FPGAs.
dcbingaman
VHDL - Using 'wait until' statement seems to not work correctly.
Last message by
dcbingaman
3
Replies
710
Views
BUZZARD1n
Need help sending 16 bits of data through serial on the DE0-nano-SOC
Last message by
BUZZARD1n
0
Replies
676
Views
A
SPI CHIP SELECT IN FPGA
Last message by
drjohsmith
2
Replies
996
Views
R
Booting is not takeplace while using ICICLE Kit
Last message by
rmbv
0
Replies
464
Views
dcbingaman
Vivado 2019.1 Issues with using the Microblaze MCS IP module.
Last message by
dcbingaman
2
Replies
1K
Views
C
Help sought using Xilinx software to do JTAG programming please?
Last message by
Chris Wilson
2
Replies
937
Views
strantor
Please recommend a video processor for FPGA noob
Last message by
tindel
2
25
Replies
2K
Views
Axel_sr
CPLD options
Last message by
Axel_sr
4
Replies
1K
Views
xaxxa
testing on a virutal FPGA
Last message by
Gorbag
1
Replies
851
Views
B
Learning Verilog coding
Last message by
drjohsmith
4
Replies
735
Views
N
Can pull-up and pull-down resistors be in the same circuit? (FPGA)
Last message by
drjohsmith
2
21
Replies
2K
Views
T
FPGA Debug
Last message by
djsfantasi
10
Replies
947
Views
S
fpga tang nano pinout...
Last message by
drjohsmith
8
Replies
2K
Views
P
FIFO does not connect to Microblaze
Last message by
FlyingDutch
1
Replies
802
Views
R
Looking for support for an old FPGA board (Lumingus Instrument Spartan 6 from 2013)
Last message by
drjohsmith
7
Replies
797
Views
Ian0
GAL16V8 from 19 years ago
Last message by
Ian0
9
Replies
1K
Views
T
has anyone installed TerosHDL on his VS code on Widwons Subystem Linux?
Last message by
TarikElec
0
Replies
724
Views
ApacheKid
Puzzling Verilog issue
Last message by
ApacheKid
4
Replies
1K
Views
tindel
Crossing clock domains - Question
Last message by
drjohsmith
1
Replies
630
Views
ApacheKid
Arty A7-35
Last message by
ApacheKid
0
Replies
615
Views
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