This is a weird question from my test today. Most of my friends couldn't figure it out either.

You have to produce a 6-input NAND Logic Gate Circuit. But you only have an unlimited number of 2-input NAND Logic Gate. Draw out the circuit design for the 6-input NAND Logic Gate.

 

You cascade the two input gates in such a way that the output is what you want it to be. A NAND gate with both inputs connected to the same source forms an inverter, aka a NOT gate.

 

Oh before we go any futher is this the expected output for a 6-input NAND Gate?

F=\(\overline{ABCDEF}\)

where A= input 1
B= input 2
C= input 3
and so on..

 

Oh before we go any futher is this the expected output for a 6-input NAND Gate?

F=\(\overline{ABCDEF}\)

where A= input 1
B= input 2
C= input 3
and so on..

Yes it is. You can also use DeMorgans Law and create an equivalent expression using NOT and OR functions

 

I know it's been about one month this has been posted, but since the solution has not been mentionned and the test is probably over (and the fact that I like doing this), here is the solution.
\(\begin{align}
F&=\overline{ABCDEF}\\
&= \overline{A} + \overline{B} + \overline{C} + \overline{D} + \overline{E} + \overline{F}\\
&= \overline{AB} + \overline{CD} + \overline{EF}\\
&= (\overline{AB} + \overline{CD}) + \overline{EF}\end{align}
\)
We also know that \(X+Y = \overline{\overline{XX}\overline{YY}}\). So you'll have:
\(
\begin{align}
\overline{AB} &= Q_1\\
\overline{CD} &= Q_2\\
\overline{EF} &= Q_3\\
\overline{Q_1Q_1} &= N_1\\
\overline{Q_2Q_2} &= N_2\\
\overline{N_1N_2} &= K_1\\
\overline{K_1K_1} &= K_2\\
\overline{Q_3Q_3} &= K_3\\
\overline{K_2K_3} &= F\end{align}\)