YABC (Yet Another Binary Clock) Project

Discussion in 'The Projects Forum' started by Lehthanis, Jan 4, 2012.

  1. Lehthanis

    Thread Starter Member

    Dec 30, 2011
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    Hi all, I started a new thread, because my previous one (in General Chat) had a thread title that wasn't related to the project...the question became a discussion about the project itself, and so I figured I'd start a new thread to get people to take a look at it for what it is.

    Anyways, I took the instructables Binary Clock (http://www.instructables.com/id/Binary-Clock/) schematic and with Sgt. Wookie and Bill Marsden, I managed to get some pretty decent changes made to it. It's much smoother in operation, but I wanted to run my new plan by everyone here and see how it looks.

    I've since added the 4013 to divide the 2Hz 4060 output into a 1hz output, so I no longer have to skip the first bit on the seconds 4024 counter.

    The project, for its size is already rather IC heavy. Is there a smaller profile way to do the work of the 4013? Does anyone see any "reduction" in profile that can be done anywhere else without losing any power?

    I'm also interested in any ideas anyone may have in regards to powering the clock and counter with 3V watch battery and the LED's with external 9V power. It would require receiving a signal from the 3V circuit and lighting the LED's with a different voltage source. I can think of several ways, but all of them would require a LOT of components.

    Anyways, here's my original thread: http://forum.allaboutcircuits.com/showthread.php?t=64099

    And I'm attaching the latest Schematic from Eagle.
     
  2. SgtWookie

    Expert

    Jul 17, 2007
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    So, you only want the clock to advance every 2 seconds?

    That's what it is going to do now.

    You're not showing the other halves of the AND-gate and the other half of the 4013. You must connect all of the unused INPUTs to either Vdd or Vss.
     
  3. praondevou

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    Jul 9, 2011
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    Unbelievable! I hear the surgeon saying : Now please stop doing this!! I have work to do!:)
     
  4. tracecom

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    Apr 16, 2010
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    I just hope the Sgt doesn't spot something in the OR connected the wrong way and start quoting the datasheet.
     
  5. Lehthanis

    Thread Starter Member

    Dec 30, 2011
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    That can't be right can it? Pin 3 on the 4060 is 2hz, the 4013 is dividing it in half to 1hz. And I changed the leds on ic2 to no longer omit the first bit. Also the unused halves of the ics are off by themselves at top right.

    I'm also getting some anomalies on the setting buttons when it reaches 59 for minutes or seconds, the next count is 4. That's consistent too, doesn't happen on the hours section.
     
  6. Lehthanis

    Thread Starter Member

    Dec 30, 2011
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    Turns out it's happening on the regular clock pulse also, not just when the set buttons are pressed. And I'm testing this without the 4013 and with the seconds 4024 starting at pin 11. So it's still set the way Sgt wookie posted in the linked thread from my first post.
     
  7. magnet18

    Senior Member

    Dec 22, 2010
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    If you could find a 3 volt relay, it would be a simple way to provide power to the LED's
    or maybe a few transistors like in a transistor amp

    Wookie is right about needing to ground the unused inputs, but I'm not sure where he's coming from with the .5Hz comment
     
  8. SgtWookie

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    Jul 17, 2007
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    I see what you did - you goofed up the bottom 4024 counter's output to incorrectly compensate for the 4013.

    Go back to the way it was in my schematic.
     
    Last edited: Jan 4, 2012
  9. Lehthanis

    Thread Starter Member

    Dec 30, 2011
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    Which pins are you talking about then? The 4013 should be putting out 1hz, which means pin 12 of the bottom 4024 should increment 1 for 1. Before, the bottom 4024 started at pin 11 because it was receiving 2hz. Doesn't the 4013 divide that in half?
     
  10. SgtWookie

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    Jul 17, 2007
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    ... and a simple way to kill the battery very, very quickly.

    DO NOT USE A RELAY!

    No, not BJT's (bipolar junction transistors) either - they are too current-hungry.

    You need to use logic-level MOSFETs that have a very low threshold, and very low gate charge.
    There are quite a few more N-ch MOSFETs to choose from than P-ch. This means that you would have to flip your LEDs around and sink current from them instead of sourcing current to them. The ground bus on the right would need to be changed to a +V power bus.

    You need to look at the schematic image I posted in the other thread. Basically, he needs to go back to the version I modified, as his new mods adds unnecessary components and problems.
     
  11. SgtWookie

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    Jul 17, 2007
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    Why add the 4013? If you leave the 4024 wired as it was before, you don't need the 4013.

    Unless you absolutely MUST have the 4013 in there for some reason, leave it wired the way it was before.

    You will see fewer "glitches" than you are seeing now.
     
  12. Lehthanis

    Thread Starter Member

    Dec 30, 2011
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    The only difference is the added 4013, and changing the bottom 4024, to no longer omit the first bit. This change should make the set buttons change seconds just as fast as they do minutes and hours. As it is in the previous schematic, seconds set half as slow.

    Also in the version you posted, my seconds and minutes go from 59 to 04 every time, and I don't know why. (I'm thinking this version will have the same problem but haven't built it yet.)

    Also, tomorrow, I'll make the unused halves closer to the used halves for clarity, and repost. I do appreciate the help. I hope I'm not seeming ungrateful with my back and forth's.
     
  13. Lehthanis

    Thread Starter Member

    Dec 30, 2011
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    Ok, in the version without the 4013 (Original), I'm getting a problem with the counters and the reset.

    I figured out that with the C11 and C12 caps in, I get both a reset and a clock increment...but both IC2 and IC3 go from 59 to 4...skipping zero, one, two, and three.

    If I pull the C11 and C12 caps, I get a proper reset and count (59, 0, 1, 2, 3, 4, etc.) but it does not increment the next IC. (IC6A does reset IC2, but does not increment IC3; IC5B does reset IC3, but does not increment IC4).

    Do I need to lower the resistance of R19 and R20 and lose the C11 and C12 caps, or do I need to change the capacitance of C11 and C12 and leave R19 and R20 alone? Or is there some other magic combination I need to try.

    It's kinda hard to explain it, I hope I'm explaining it correctly. I also hope the updated schematics included in this post help out with understanding what I'm trying to achieve. I've labeled the busses that provide the output from IC1 and in the updated 4013 version, I've labeled the output as 1Hz to show the intent there. You can then see the reason the LED's are wired to IC2 differently.

    Ultimately though...my prototype board currently has the Original schematic built, and I don't want to try the new version until I work out the glitches discussed above.
     
    Last edited: Jan 5, 2012
  14. praondevou

    AAC Fanatic!

    Jul 9, 2011
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    When the output of IC6A goes high the Reset of IC2 is being delayed and therefore the time it takes for the output of IC6A to go LOW again is also delayed.

    From what you describe I presume that without C12, IC2 is reset so fast that the output pulse of IC6A is too short to trigger IC3, i.e. the negative edge is not being recognized by IC3. (time Tw of the datasheet too short)

    I'm not sure about the skipping issue. The only thing I see is that the RESET input of the 4024 is not a schmitt trigger input so when charging / discharging C11/12 the chip could get into an undefined state.

    So what we want is have a pulse width long enough at the output of IC6A/IC5B to make sure the minimum HIGH time before a negative edge on the clock input of the next 4024 is met. And we don't want an RC of 100k/100n at the RESET input.


    Before doing anything else I would try to lower the value of R20/R19. I didn't follow this thread until now but I presume they are a protection when S4 and another switch are closed?

    R20 and R19 form an RC with the input capacitance of the clock input. that means the clock input signal rise time increases with a higher R20/R19.

    Remove C12/C11 or lower their value.
     
  15. praondevou

    AAC Fanatic!

    Jul 9, 2011
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    Another option:

    Remove C11/C12. Leave R19/R20 at 100k or decrease them a bit. Leave these resistors connected as they are.

    Use only one 4082 IC (for IC6A and IC5B).

    Use a 4081 (4 x AND gate) and use one of its gates for IC5A.

    There will be 3 AND gates left.

    Connect one AND gate with both inputs tied together to the RESET inputs (one for each), i.e. only the signal for the RESET will be delayed by the propagation delay of the added gate.
    This will increase the pulse width at the output of the 4082 gates and therefore give more time for the 4024 counter clocks to respond.

    The IC count will not be increased this way.

    Sorry, can't draw anything right now, I hope it's clear.
     
  16. Lehthanis

    Thread Starter Member

    Dec 30, 2011
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    Thanks for the help praondevou! Before your most recent post, I just managed to get it to work properly by dropping C11/C12 and lowering R19/R20 to 51K. This works perfectly I think. Can you see any reasons to deviate from this configuration? (Could 51K be too low? It was the first lower resistor I tried...should I move the resistance back towards 100K until it no longer works, and then take the largest working resistor value?)

    Also, with this portion working properly. Do you see any problems with the new version of the schematic that drops in the 4013 to divide the 2Hz pulse down to 1Hz, thus making the set time buttons all function at the same speed?
     
  17. Lehthanis

    Thread Starter Member

    Dec 30, 2011
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    I got to thinking about your concept of changing IC2 and IC3's reset conditions to be on one 4082. But instead of using a 4081 to reset IC4, could I use a transistor based hand built AND gate? (http://230nsc1.phy-astr.gsu.edu/hbase/Electronic/trangate.html#c1)

    I think it would go a long way towards teaching me more about how logic works both logically and electrically. My question then would be, given the schematic on the link above, I'm looking at a 4.7K resistor, two 10K resistors, and two NPN transistors. Do they have to be 2n222? Something tells me the resistors need to change if I'm dealing with +9V instead of +6V...right?
     
  18. praondevou

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    Jul 9, 2011
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    Can you tell us what EXACT chip you used for the 4024 and 4082? (Which series/manufacturer) Knowing this the datasheets will tell us what the maximum delays are.

    If this is a single unit you want to build, you can try it with the lower resistors as you did.
    Even lower than 51k. CMOS gates can handle a few mA output current. I would not go too near the point where it doesn't work anymore though because these characteristics may change with temperature.

    I don't see a problem using the 4013.


    If you want to replace IC5A you can do this with two small signal diodes like the 1n4148 and a pullup resistor.
    As I said I have nothing to draw anything up here. I could do it in the evening if you wish.

    Place a pullup resistor of e.g. 47k at the RESET input of IC4. connect the RESET input of IC4 also to the anodes of two diodes whose cathodes will be connected to Q4 and Q5 of IC4. When Q4 and Q5 are both HIGH the voltage at the RESET input will rise and the counter will be reset.
    That's the same function as an AND gate.
     
  19. bwack

    Active Member

    Nov 15, 2011
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    About the schematic (the one wookie pulled away the 4013 chips).
    I'm not completey sure about the skipping issue either, but you do have got a delay allright for the clock pulses, but you don't have a good hold time for the reset to properly clear the counters's outputs. I'm guessing thats why you get incorrect value after reset. Could you sync the reset with the clock somehow ?

    Btw, is your counters in the schematic incorrect, isn't there supposed to be a ball on the clock inputs of the counters (negative flange trigger). ?
     
    Last edited: Jan 5, 2012
  20. praondevou

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    Jul 9, 2011
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    What you are saying is that it takes a different time for each output to go LOW after the RESET input is activated. Maybe possible. But actually they should be reset at almost the same moment with possibly a few nanoseconds between them. However if you are right then yes the AND gate will release the RESET input as soon as 1 output goes LOW...

    Would need an oscilloscope to confirm that.

    Yes, I agree, the datasheet says it's negative edge triggered.
     
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