Why would DCFSNZ take 1,2 or 3 instruction cycles?

Discussion in 'Embedded Systems and Microcontrollers' started by spinnaker, Jan 24, 2011.

  1. spinnaker

    Thread Starter AAC Fanatic!

    Oct 29, 2009
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    DCFSNZ decrements a file register and skips the next instruction if it is zero. So I can under stand how it could just take 1 instruction cycle if it just decrements.

    And I can understand if it decrements and the result is zero, it skips, the decrement would take 1 and the skip would take 2. But how could the instruction take 2 cycles?


    Is the register tested when first executed? So it is zero, it skips with no decrement? Then that would only take 2 cycles?
     
  2. John P

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    Oct 14, 2008
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    This is a PIC instruction, if anyone was wondering!

    "Why would DCFSNZ take 1,2 or 3 instruction cycles?"

    It doesn't. It's 1 cycle if the jump isn't made, and 2 if it is.
     
  3. t06afre

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    May 11, 2009
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    From the pic 16fxxx datasheet
     
    Last edited: Jan 25, 2011
  4. AlexR

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    Jan 16, 2008
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    As t06afre said for pic16 series its a 1 or 2 cycle instruction. 1 cycle to decrement and test and a further cycle to skip over the next instruction by replacing it with a NOP if the test proves to be true.

    For pic18 processors its a 1,2,or 3 cycle instruction. Again 1 cycle to decrement and test and then a further 1 or 2 cycles to skip over the following instruction. This is because the pic18 instruction set contains some 2 word instructions and if the instruction following the DCFSNZ is a 2 word instruction then the processor has to replace it with 2 NOPs making a total of 3 machine cycles.
     
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  5. John P

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    Oh, a PIC18. You should have said.
     
  6. spinnaker

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    Thanks!


    I did not realize the instructions where replaced on the PIC. I figured the PC would just be changed. So I guess that makes sense why it would use a different number of instruction cycles depending on what followed the decrement.
     
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