Why the stable supply voltage is "shaked" after connected to the testing board ?

Discussion in 'General Electronics Chat' started by matrixon, Dec 22, 2015.

  1. matrixon

    Thread Starter New Member

    Dec 22, 2015
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    I used a power supply to supply 1.8V as the Vdd of the tested-circuit, after I connected 1.8V to the Vdd pad of the testing-board, the originally "clean" 1.8V began to shake(the total current is about 70mA,and the shaking is not sinnusoidal).

    The phenomenon can be improved by adding 1uF cap between Vdd and gnd Pad,but the shaking still exsited(about 250mVPP). Why the originally clean Vdd is shaked after connected to the testing-board?

    By the way,the board only contain an OP amp that I want to test,and some I/O port(ex:header,SMA,switch......),and all inputs are shorted to ground.

    the image is the shaking wave after adding the cap between Vdd and ground.
     
  2. DickCappels

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    Aug 21, 2008
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    Your opamp may be oscillating. Yry a larger capacitor and put a .01 uf capacitor in parallel with it, and both capacitors very close to the opamp.
     
  3. R!f@@

    AAC Fanatic!

    Apr 2, 2009
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    May be the supply has poor transient response.
     
  4. DickCappels

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    Wait a minute...what kind of opamp circuit draws 70 ma?
     
  5. matrixon

    Thread Starter New Member

    Dec 22, 2015
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    I designed the OP amp six months ago,before sending the layout to TSMC , I had done the post-layout simulation and everything is fine,phase margin >60 degree and transient response is fine.So the OP amp may not be oscillating.And do you mean I need to replace the 1uF cap by larger cap and put a 0.01uF cap in parallel with it ?I don't understand.

    [/QUOTE]
    The large current is my design mistake.

    I don't think so.All of my Senior Alumnus use this power supply
     
  6. R!f@@

    AAC Fanatic!

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    You should use bypass caps across the OPAMP
     
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  7. #12

    Expert

    Nov 30, 2010
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    I see wiggles at about 1 MHz. Large capacitors don't work well in this region. 10 nf ceramic presents much better quality in that frequency range.
     
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  8. matrixon

    Thread Starter New Member

    Dec 22, 2015
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    where should I add the bypass cap?why do I need this cap?
    I don't unserstand the reason for the wiggles of VDD .The wiggles only appear after I connecting the VDD to the testing board and the original supply is clean.
    Do you know the reason for the effect?
     
  9. #12

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    Yes. The load causes the changes.
     
  10. DickCappels

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    Aug 21, 2008
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    We are getting along on surprisingly little information. Can you post your test circuit and describe the setup, such as power supply voltage(s) the input signal, and anything else that might give a clue as to what your problem might be?

    An explanation: Large bypass capacitors lower the power supply impedance at low frequencies, as #12 said, you still should add a .01 uf ceramic capacitor in parallel with it so the impedance remains low at high frequencies. If the amplifier power supply pins are not well bypassed then the impedance seen by the power supply pins is not well defined and that can lead to oscillation.
     
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  11. #12

    Expert

    Nov 30, 2010
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    If you have a perfectly quiet glass of water (supply) and you remove some water from one side while replenishing it from the other side, it will not remain perfectly quiet. Why do you think you can cause movement of power and it will remain perfectly quiet?
     
  12. WBahn

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    Mar 31, 2012
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    When you say that the "OP amp may not be oscillating" are you asserting that it is inconceivable that the OP amp might be oscillating because you did a post layout simulation? Despite having a design mistake that causes it to draw excessive current? Did your post-layout simulation show that kind of current draw? If so, why did you not spot and fix the error? If not, then the circuit you simulated isn't the circuit you had fabbed, is it?

    Did your post-layout simulation include all of the various parasitics, such as bond-wire inductance, package pad capacitance, PCD trace resistance, capacitance, inductance? If not, then why are you so convinced that your post-layout simulation result is a guarantee that your opamp can't be oscillating?
     
  13. matrixon

    Thread Starter New Member

    Dec 22, 2015
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    You are right.Adding the cap can make the Vdd clean again.Thank you for your help!!
     
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