Here I am attaching step down buck converter circuit. While testing, mosfets on high side get hot extremely high even for 100W load. Low side has no problem. All mosfets are fixed on very big heat sink. Anyone please help me to overcome this problem.

Components used are as per given in circuit. PWM frequency is 50KHz & max duty is 80%. Gate voltage observed is always >10v.

 

It is possible that differences in the FET Vgs values is reflected in different Rds(on) values and hence increased power dissipation in the devices not fully ON.

When you measured the gate voltage as >10V I assume that was on the lower side gates, the high side gates will require something much higher than the output voltage of 24V to turn these devices on fully.

 

Check that the boootstrap circuit is working. What voltage is there at pin Vb of the 2110?

 

As noted by pwdixon the Vg of the high side FETs must be higher than 10V.
For a 24V supply the ON gate voltage for those should be at least 34V with respect to ground with fast rise and fall times.

 

In your circuit, the IR2110 creates a voltage about 11 volts higher than the 24 volt supply to turn the high side gate on. This is done on the 47 uF capacitor , which is charged every time the output is "low", but must remain high during the entire "high" portion of the pulse. During the "high" portion, the high side gate voltage starts out at 11 volts and then discharges capacitors C9 and C10, and the gate drive power supply droops.

In your circuit, you have 6 1K resistors in parallel (R13 through 18), or about 167 ohms, discharging the capacitor. Unless your high side pulse is of a very short duration, the high side fets will be in the active region as pwdixon has suggested.

When a FET is "on" the voltage is almost zero, so the FET power (VxA) is also low. When it is off the current is zero, so the same applies. but when the fet is partially on, there is voltage across the FET at the same time current is present, hence heating will occur.

If you calculate the longest period that the high side needs to be continuously on, then calculate the time constant of the parallel resistor and charge capacitor, you will probably see the problem. you need an RC time constant at least 10 times the pulse width; more is better. Increase R13 through R18 to meet this criterion and give it a try.

Also, if you are running flat out (no PWM) and the motor is turning slowly or stalling, no capacitance may give you a long enough duration. Your controller may have to throw in a low pulse occasionally if this is a problem.

 

Oops; I see you are running a light bulb, so the last comment about the motor does not apply.

 

It is possible that differences in the FET Vgs values is reflected in different Rds(on) values and hence increased power dissipation in the devices not fully ON.

When you measured the gate voltage as >10V I assume that was on the lower side gates, the high side gates will require something much higher than the output voltage of 24V to turn these devices on fully.

pwdixon: required voltage for gate is available there. I have doubt, is IR2110 suitable for driving 6 mosfet at a time.

 

If the volts are there to put even one device hard on then they all should be. FETs are voltage controlled devices and shouldn't present a load on a chip output.

 

FETs are voltage controlled devices and shouldn't present a load on a chip output.

The gate capacitance (which is large for power FETs) has to be charged/discharged, so the current (load) is proportional to the rate of switching of the FETs and can be quite significant.

 

Another point you should be concerned -- when you using mosfets in parallel then you better in series with a resistor for each mosfet -- AN11599 Using power MOSFETs in parallel - NXP

 

If the volts are there to put even one device hard on then they all should be. FETs are voltage controlled devices and shouldn't present a load on a chip output.

A question pertaining to this statement that many people make. While voltage is what the gate uses, doesn't there need to be sufficient amperage to charge the gate capacitance? The IR2110is a first generation gate driver, all of the newer ones have a much higher amperage output than the first generations do. And the newer ones mostly use the same pin out of the older ones.

 

A question pertaining to this statement that many people make. While voltage is what the gate uses, doesn't there need to be sufficient amperage to charge the gate capacitance? The IR2110is a first generation gate driver, all of the newer ones have a much higher amperage output than the first generations do. And the newer ones mostly use the same pin out of the older ones.

I know I should have said in a DC situation...... I must admit I hadn't considered the PWM and the possible source of problems that could cause, first level thinking I'm afraid.

 

Check to see if signal on out1 is going a volt or so above 24 volts when the low side switches off. If it is, the high side FETs' body diodes might be clipping and conducting.

 

How are the pwm waveform from uC?

 

If the volts are there to put even one device hard on then they all should be. FETs are voltage controlled devices and shouldn't present a load on a chip output.

Charging and discharging the gate capacitance does - it increases with the number of MOSFETs in parallel and the switching frequency.

 

Charging and discharging the gate capacitance does - it increases with the number of MOSFETs in parallel and the switching frequency.

Are you saying that when in parallel the internal capacitors of the mosfets, the switching frequency will increasing?

 

Are you saying that when in parallel the internal capacitors of the mosfets, the switching frequency will increasing?

Its always been my understanding that capacitors in parallel result in a larger sum than the individual components.

The opposite of resistances which the sum is bigger when you put them in series.

Just to confuse you even more - two inductors in series equals the sum, but if they share the same core; the mutual coupling results in inductance raised to a power.

 

If you can look at the waveform on out1, it should resemble a triangle wave. If it is spiking, you could be saturating your inductor. This would indicate high current spikes in the high side FETs.

 

Its always been my understanding that capacitors in parallel result in a larger sum than the individual components.

The opposite of resistances which the sum is bigger when you put them in series.

Just to confuse you even more - two inductors in series equals the sum, but if they share the same core; the mutual coupling results in inductance raised to a power.

Normally when in parallel the capacitors then the capacitance will be getting bigger, so the switching frequency will be lower, this is the normal issue or has some other reasons cause that and not follow the normal calculation?

 

How are the pwm waveform from uC?

It is okay means perfect PWM.