Why am I getting unwanted pulse in generating complementary pwm signal using msp430g2553?

Discussion in 'Embedded Systems and Microcontrollers' started by Tahsina Hossain, Mar 7, 2015.

  1. Tahsina Hossain

    Thread Starter Member

    Jan 16, 2015
    40
    0
    Hi,

    I am trying to generate 2 complementary sinusoidal PWM signals using msp430g2553. I want to use those as unipolar SPWM to drive a full-bridge.

    Spec:
    Reference Signal = 50 Hz
    Triangular Signal = 2.5 kHz
    pwm period = 0.4ms or 400 us
    dead time between 2 signals = 1 us (this is why I am using up/down mode and Timer1_A3)

    However, I am getting below output in the oscilloscope:
    complementary.jpg

    I am not sure why few pulses are out of shape. What am I doing wrong? Below is my code for your review. Any help is highly appreciated.

    Code (Text):
    1. #include  <msp430g2553.h>
    2.  
    3. const unsigned int phalfcycle[25] = {100, 110, 120, 129, 139, 147, 155, 162, 168, 172, 176, 179, 180, 180, 179, 176, 172, 168, 162, 155, 147, 139, 129, 120, 110};
    4. const unsigned int complementary[25] = {99, 109, 119, 128, 138, 146, 154, 161, 167, 171, 175, 178, 179, 179, 178, 175, 171, 167, 161, 154, 146, 138, 128, 119, 109};
    5.  
    6. unsigned int index = 0;
    7.  
    8. void main(void)
    9. {
    10.   WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
    11.  
    12.   //Calibrate DCO for 1MHz operation
    13.   BCSCTL1 = CALBC1_1MHZ;
    14.   DCOCTL = CALDCO_1MHZ;
    15.  
    16.   P2DIR |= BIT1 + BIT4;                            // P2.1 and P2.4 pwm output
    17.  
    18.   TA1CCR0 = 200 - 1;                               // PWM Period/2; period is 0.4ms or 400us
    19.  
    20.   TA1CCTL0 = CCIE;                                    // CCR0 interrupt
    21.   TA1CCTL1 = OUTMOD_6;                         // CCR1 toggle/set
    22.   TA1CCTL2 = OUTMOD_2;                            // CCR2 toggle/reset as complementary
    23.   TA1CTL = TASSEL_2 + MC_3 + TACLR;                  // SMCLK, up-down mode
    24.  
    25.   _BIS_SR(LPM0_bits + GIE);                       // Enter LPM0
    26. }
    27.  
    28.  
    29. #pragma vector=TIMER1_A0_VECTOR                        // ISR for CCR0
    30. __interrupt void Timer_A0 (void)
    31. {
    32.     TA1CCR1 = phalfcycle[index] - 1;
    33.     TA1CCR2 = complementary[index] - 1;             // deadtime = 1us
    34.  
    35.             index = index + 1;
    36.             if(index == 25)
    37.             {
    38.                 index = 0;
    39.                 P2SEL ^= BIT1;
    40.                 P2SEL ^= BIT4;
    41.             }
    42.  
    43. }
    44.  
    45.  
     
  2. MrChips

    Moderator

    Oct 2, 2009
    12,415
    3,354
    I think your problem has to do with interrupt latency.

    TIMER1 CCR0 interrupts occur at the top of the cycle when the counter reaches TA1CCR0.
    Then you are attempting to alter TA1CCR1 and TA1CCR2 to values that are too close to the timer count.

    Increase TA1CCR0 to 250 and see if that helps.

    btw, why are you toggling P2SEL?
     
  3. Tahsina Hossain

    Thread Starter Member

    Jan 16, 2015
    40
    0
    Thanks for the reply. I also think the same. I need to check for higher CCR0 value. Actually, I want to implement unipolar sinusoidal pwm which requires 4 signals to drive a full bridge. The code in discussion is part of the whole solution.
     
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